Wafer-Level Conductive Shielding Trenches for IC EMI Protection
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Solution Overview
Problem
Conventional integrated circuit manufacturing processes are time-consuming and costly due to the need for forming shielding layers on all sides of the chip during the packaging process, which requires additional steps and resources after dicing the wafer.
Innovation Solution
Forming conductive shielding layers on multiple sides of the integrated circuit during wafer processing by creating trenches between chip regions and depositing the shielding material along these trenches, allowing for complete shielding before the chip is diced from the wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shielding layers are formed on all sides of the chip during the packaging process, then complete electromagnetic shielding is achieved, but manufacturing time and costs increase
Solution Approach 1:
The patent applies preliminary action by forming the shielding layer on multiple sides of the integrated circuit during wafer processing, before the chip is separated from the wafer. This allows the shielding structure to be created in advance while the chips are still mounted on the wafer, eliminating the need for additional shielding steps during the packaging process and reducing overall manufacturing time.
Solution Approach 2:
The patent merges the shielding layer formation process with the wafer processing steps. By integrating the shielding deposition into the existing wafer fabrication sequence, the patent combines multiple functions (chip fabrication and shielding creation) into a single coordinated process, thereby improving efficiency without compromising shielding effectiveness.
2Reliability
If shielding layers are formed on all sides of the chip during the packaging process, then complete electromagnetic shielding is achieved, but manufacturing costs increase
Solution Approach 1:
By performing the shielding layer formation during wafer processing rather than during packaging, the patent takes advantage of the existing manufacturing infrastructure and process integration. This preliminary action approach consolidates process steps and reduces the need for additional packaging equipment and operations, thereby lowering manufacturing costs.
Solution Approach 2:
The patent combines the shielding layer formation with wafer processing operations, merging what would otherwise be separate manufacturing stages. This integration allows for shared equipment usage, reduced process complexity, and lower overall manufacturing costs while achieving complete electromagnetic shielding.
3Productivity
If shielding layers are formed on multiple sides during wafer processing, then manufacturing time is reduced, but process complexity increases
Solution Approach 1:
The patent uses preliminary action to form shielding layers on multiple sides of the integrated circuit during wafer processing. By performing this action while the chips are still mounted on the wafer, the process leverages the existing wafer handling and deposition infrastructure, making the complex task of multi-sided shielding more manageable and integrated into the standard fabrication flow.
4Ease of manufacture
If shielding layers are formed during wafer processing, then packaging process is simplified, but wafer processing complexity increases
Solution Approach 1:
The patent merges the shielding layer formation into the wafer processing sequence, combining what would traditionally be separate operations. This integration simplifies the packaging process by eliminating the need for additional shielding steps, while the added complexity in wafer processing is managed through coordinated process planning and existing fabrication infrastructure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing time and costs by integrating shielding on all sides of the chip during wafer processing, enhancing protection against external electromagnetic fields and simplifying the packaging process.
Implementation Method 1
This shielding layer typically is made of a conductive material and shields the chip from external electromagnetic fields, to reduce the effects of the external electromagnetic fields on components or operations of the chip
Implementation Method 2
forming a conductive shielding layer for the integrated circuit along a side of the trench
Data Source
AI summary
Described herein are techniques for forming, during wafer processing, a conductive shielding layer for a chip formed from a wafer. The conductive shielding layer can be formed on multiple sides of a chip prior to dicing the wafer to separate the chip from the wafer. A wafer may be processed to form trenches that extend substantially through the wafer. The trenches may be formed opposite scribe lines that identify boundaries between chips of the wafer and may extend through the wafer toward the scribe lines. A shielding layer may be formed along the trenches.