Wafer Level CSP Opaque Encapsulation
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Solution Overview
Problem
Current wafer level chip scale packages (WLCSPs) have unencapsulated planar surfaces, fragile solder ball contacts, and are susceptible to light exposure and physical damage due to transparent polymer coatings, which affect device operation and handling.
Innovation Solution
A single layer of encapsulation material thinner than the substrate covers the top, bottom, and side surfaces of the wafer die, with locking features for improved adhesion and conductive bumps for electrical coupling, and the encapsulation material can be opaque to address these issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transparent polymer coating is used to protect the WLCSP, then the device circuitry is visually observable for inspection, but light passes through the coating and adversely affects the operation of the device circuitry
Solution Approach 1:
The patent applies an opaque coating (such as a black polymer or metal layer) to the WLCSP package instead of a transparent coating. This opaque coating blocks light from reaching the device circuitry, preventing light-induced operational issues while still providing protective coverage. The coating change from transparent to opaque directly addresses the light exposure problem while maintaining protection functions.
2Area of stationary object
If the back side of the WLCSP is left unencapsulated, then the package size is minimized, but the back side is susceptible to chipping and physical damage
Solution Approach 1:
The patent extends the encapsulation coating to cover the entire surface of the WLCSP package, including the back side that was previously left unencapsulated. This merging of the encapsulation coverage from partial (front side only) to complete (all surfaces) provides uniform protection against chipping and physical damage while maintaining a compact package size. The coating is applied as a continuous layer across all surfaces.
Solution Approach 2:
The patent uses a thin film encapsulation coating (such as a polymer or ceramic layer) that provides protective coverage while maintaining a compact package profile. This thin film extends over the edges and covers the back side, providing strength and resistance to chipping without significantly increasing the overall package size. The thin film nature allows for edge coverage while maintaining size constraints.
3Ease of operation
If solder ball electrical contacts are used on the bottom surface, then electrical connection to external circuits is achieved, but the solder balls are relatively fragile and can be damaged during shipping and handling
Solution Approach 1:
The patent integrates the solder balls or other electrical contacts directly into the encapsulation coating itself, rather than placing them separately on the package surface. This merging of the contacts with the encapsulation structure provides mechanical support and protection to the fragile electrical contacts during shipping and handling, while maintaining their electrical connection functionality to external circuits.
Data Source
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AI summary
An electronics package includes a wafer die substrate containing electronic circuits and having a top surface and a bottom surface. A top protective layer is substantially thinner than the substrate and covers the top surface. A bottom protective layer is substantially thinner than the substrate and covers the bottom surface. Circuit contacts are distributed about the bottom protective layer for electrically coupling the substrate electronic circuits to external electronic circuits.