Wafer Level Package for Implantable Defibrillator HV Units
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Solution Overview
Problem
Current wafer level packaging technologies for implantable cardiac defibrillators (ICDs) face challenges in achieving compact, high voltage unit configurations that integrate multiple components effectively, while ensuring electrical isolation and reducing device size for improved implant comfort.
Innovation Solution
A multi-chip modular wafer level package is developed, combining high voltage (HV) and low voltage (LV) solid-state component chips with passive components in a single polymer mold compound, using redistributed chip packaging (RCP) and conductive interconnects like lead frames or conductive polymer vias to facilitate compact and reliable integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional packaging technologies are used for high voltage units, then electrical isolation and reliability are maintained, but device size remains large reducing implant comfort
Solution Approach 1:
The patent combines multiple discrete packaging technologies into a single integrated wafer-level package. High voltage and low voltage circuits, previously packaged separately to ensure electrical isolation, are merged into one monolithic structure with built-in isolation barriers, achieving both compact size and maintained reliability
Solution Approach 2:
The invention transitions from planar 2D packaging to 3D vertical stacking within the wafer-level package. Multiple circuit layers are stacked vertically with through-silicon vias and isolation structures, enabling compact integration while maintaining electrical separation between high voltage and low voltage sections
2Ease of manufacture
If multiple discrete components are packaged separately, then electrical isolation is ensured, but integration efficiency and device compactness are reduced
Solution Approach 1:
The wafer-level package is segmented into distinct functional regions for high voltage and low voltage circuits, with dedicated isolation structures between them. This segmentation allows standardized manufacturing processes to be applied to each region while achieving integrated packaging
Solution Approach 2:
The patent develops a universal wafer-level package platform that can accommodate different high voltage unit configurations (transformers, capacitors, switches) using the same fundamental packaging architecture and process flow, improving manufacturing efficiency across product variants
Data Source
AI summary
A multi-chip modular wafer level package of a high voltage unit for an implantable cardiac defibrillator includes one or more high voltage (HV) component chips encapsulated with other components thereof in a polymer mold compound of a single reconstituted wafer, wherein all interconnect segments are preferably located on a single side of the wafer. To electrically couple a contact surface of each HV chip, located on a side of the chip opposite the interconnect side of the wafer, the reconstituted wafer may include conductive through polymer vias; alternately, either wire bonds or layers of conductive polymer are formed to couple the aforementioned contact surface to the corresponding interconnect, prior to encapsulation of the HV chips. In some cases one or more of the components encapsulated in the reconstituted wafer of the package are reconstituted chips.