Wafer-Level Isolated Power Chip With RDL Micro-Transformer Integration
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Solution Overview
Problem
Existing isolated power supplies face challenges with low efficiency, large size, high electromagnetic noise, and high cost, particularly in applications where size and cost are constrained, leading to issues with power density and parasitic inductances from bonding wires.
Innovation Solution
An isolated power chip based on wafer level packaging using an RDL-based micro-transformer with integrated transmitting and receiving chips, eliminating the need for a single transformer chip and replacing gold wire bonding with RDL interconnection, enhancing power density and efficiency through improved Q values and coupling coefficients.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If a single transformer chip is used in existing isolated power supplies, then the device achieves power isolation functionality, but the packaging size becomes large and power density becomes low
Solution Approach 1:
The patent merges the transformer and chips into a single integrated package using wafer-level packaging technology. The primary coil, secondary coil, transmitting chip, and receiving chip are all integrated within one package, eliminating the need for separate transformer chip mounting and reducing overall packaging size while increasing power density.
Solution Approach 2:
The patent transitions from traditional three-dimensional wire bonding interconnections to planar two-dimensional RDL (redistributable layer) interconnections. This dimensional change allows for more compact layout and reduces the vertical height required for wire bonds, thereby reducing packaging size and improving power density.
2Loss of energy
If gold wire bonding is used for interconnection, then electrical connections are established, but parasitic inductances adversely affect system electrical performance and conversion efficiency decreases
Solution Approach 1:
The patent replaces the mechanical wire bonding system with an integrated RDL (redistributable layer) system. The RDL provides planar electrical interconnections that eliminate the parasitic inductances associated with wire bonds, thereby improving conversion efficiency and electrical performance.
Solution Approach 2:
The patent changes the interconnection parameter from wire-based three-dimensional bonding to planar RDL traces. This parameter change reduces the loop area and inductance of the electrical paths, directly improving conversion efficiency by minimizing energy losses.
3Ease of manufacture
If traditional packaging methods are used, then device assembly is straightforward, but packaging cost becomes high and manufacturing complexity increases
Solution Approach 1:
The patent combines multiple discrete components (transformer, transmitting chip, receiving chip) into a single integrated wafer-level package. This merging eliminates the need for separate assembly steps for mounting and wire bonding, reducing both packaging cost and manufacturing complexity despite the integrated design.
Solution Approach 2:
The patent performs preliminary integration of all components at the wafer level before final packaging. By pre-integrating the transformer and chips with their interconnections during wafer fabrication, the subsequent packaging process becomes simpler and more cost-effective, as no additional wire bonding or chip mounting is required.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces packaging size and cost while improving power conversion efficiency and reducing electromagnetic noise, enabling efficient transmission of watt-level power in size and cost-constrained applications.
Implementation Method 1
a transmitting chip connected to the primary coil of the RDL-based micro-transformer, and configured to receive the direct-current voltage, convert the direct-current voltage into an alternating current signal
Implementation Method 2
a receiving chip connected to the secondary coil of the RDL-based micro-transformer, and configured to convert the alternating current signal into a direct-current signal
Data Source
AI summary
An isolated power chip based on wafer level packaging, including: an RDL-based micro-transformer, where a primary coil of the RDL-based micro-transformer is connected to a direct-current power supply and configured to output a direct-current voltage input by the direct-current power supply; a transmitting chip connected to the primary coil of the RDL-based micro-transformer, and configured to receive the direct-current voltage, convert the direct-current voltage into an alternating current signal, and transmit the alternating current signal to a secondary coil of the RDL-based micro-transformer; and a receiving chip connected to the secondary coil of the RDL-based micro-transformer, and configured to convert the alternating current signal into a direct-current signal, generate a control signal for stabilizing the output voltage according to a change of a load, and encode the control signal for digital isolation. The present disclosure further provides a method of manufacturing an isolated power chip based on wafer level packaging.