Wafer-Level LED Package Fabrication Process
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Solution Overview
Problem
Conventional LED package fabrication is time-consuming and expensive due to individual chip handling and complex wire bonding processes, limiting productivity and package miniaturization, and prone to failures from bonding issues.
Innovation Solution
A method involving the formation of semiconductor stacks on a first substrate, bonding to a second substrate with lead electrodes, and cutting both substrates to create packages, using underfill and wavelength converters for bonding reinforcement and light conversion, while simplifying the chip bonding process and enabling miniaturization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If individual LED chips are mounted on a package and connected using bonding wires, then the LED package can be fabricated with conventional processes, but the production time increases and productivity decreases
Solution Approach 1:
The patent merges multiple individual chip mounting operations into a single wafer-level bonding operation. Multiple LED chips are simultaneously bonded to the package substrate in one step, eliminating the need for repeated individual mounting processes and significantly reducing production time.
Solution Approach 2:
The patent performs preliminary actions by pre-arranging multiple LED chips on the package substrate in a single bonding step before individual chip mounting. The wafer-level bonding process pre-establishes all electrical connections simultaneously, avoiding subsequent repeated bonding operations.
2Reliability
If bonding wires are formed after LED chips are mounted, then electrical connections can be established, but the fabrication process becomes complicated
Solution Approach 1:
The patent extracts the wire bonding step from the fabrication process by directly bonding LED chips to the package substrate at the wafer level. This eliminates the need for subsequent wire bonding operations, simplifying the overall fabrication process while maintaining reliable electrical connections through direct chip-to-substrate bonding.
Solution Approach 2:
The patent performs preliminary electrical connection establishment through wafer-level bonding before chip mounting. All necessary electrical connections are pre-established in the initial bonding step, eliminating the need for subsequent wire bonding operations and reducing process complexity.
3Reliability
If wire bonding process using capillaries is used to connect LED chips, then electrical connections can be made, but the package size cannot be reduced due to space requirements for capillary movement
Solution Approach 1:
The patent removes the capillary-based wire bonding process entirely by implementing direct wafer-level bonding of LED chips to the package substrate. This eliminates the need for capillary movement space, enabling significant package size reduction while maintaining reliable electrical connections through direct bonding.
Solution Approach 2:
The patent replaces the mechanical wire bonding system requiring capillary movement with a direct bonding system. The mechanical process of wire manipulation through capillaries is substituted with a direct chip-to-substrate bonding mechanism, eliminating space requirements for capillary movement and enabling miniaturization.
4Quantity of substance
If thousands of LED chips are fabricated on a single growth substrate, then mass production demand can be met, but conventional fabrication methods cannot handle the quantity efficiently
Solution Approach 1:
The patent merges thousands of individual chip mounting operations into a single wafer-level bonding process. By processing entire wafers containing multiple LED chips simultaneously, the method achieves high-volume fabrication while maintaining efficiency, directly addressing the demand for mass production of large quantities of LED packages.
Solution Approach 2:
The patent performs preliminary mass mounting of thousands of LED chips in a single wafer-level bonding step. This preliminary action establishes all electrical connections for large quantities of chips simultaneously, enabling efficient mass production that can handle the output from large-area growth substrates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the chip bonding process, reduces production time, enhances structural stability, and allows for miniaturization and efficient light conversion, particularly for white light emission, while preventing moisture penetration and improving light extraction efficiency.
Implementation Method 1
The underfill may include a filler for adjusting a coefficient of thermal expansion and/or a modulus of elasticity
Implementation Method 2
The underfill may include a phosphor for converting a wavelength of light emitted from the semiconductor stacks
Data Source
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AI summary
Disclosed are a wafer level LED package and a method of fabricating the same. The method of fabricating a wafer level LED package includes: forming a plurality of semiconductor stacks on a first substrate, each of the semiconductor stacks comprising a first-conductivity-type semiconductor layer, a second-conductivity-type semiconductor layer, and an active region disposed between the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer; preparing a second substrate comprising first lead electrodes and second lead electrodes arranged corresponding to the plurality of semiconductor stacks; bonding the plurality of semiconductor stacks to the second substrate; and cutting the first substrate and the second substrate into a plurality of packages after the bonding is completed. Accordingly, the wafer level LED package is provided.