Wafer Level Packaging Through Hole Metal Substitution
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Solution Overview
Problem
Conventional wafer-level packaging methods for bulk acoustic wave (BAW) devices result in poor resistance at the contact interface between metal connection pads, leading to adverse effects on the resistance of through-silicon vias and increased manufacturing costs due to the use of gold, which is expensive and can contaminate CMOS devices.
Innovation Solution
A semiconductor device and manufacturing method that includes a substrate with through holes filled with metals like copper, aluminum, or tungsten, and a cap assembly with a metal connection member and pad made of copper or aluminum, bonded under specific pressure and temperature conditions to reduce resistance and contamination issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gold is used to form the connection between the metal connection member and the metal connection pad, then the reliability of the electrical connection is improved, but the manufacturing cost increases and contamination risk to CMOS devices increases
Solution Approach 1:
The patent replaces expensive gold with cheaper alternative metals such as copper, aluminum, or tungsten for the through-holes and connection interfaces. This substitution significantly reduces manufacturing costs while maintaining adequate electrical connection reliability for the application requirements.
Solution Approach 2:
The patent changes the material parameters of the connection elements from gold to alternative metals. By adjusting the material composition and optimizing the bonding process parameters (pressure, temperature, time), the patent achieves reliable electrical connections without using gold, thereby reducing cost and contamination risk.
2Reliability
If gold is used to form the connection between the metal connection member and the metal connection pad, then the reliability of the electrical connection is improved, but the harmful contamination effects on CMOS devices increase
Solution Approach 1:
The patent replaces gold with alternative metals that do not pose the same contamination risks to CMOS devices. Copper, aluminum, and tungsten are used instead, eliminating the harmful effects associated with gold contamination while maintaining connection reliability.
Solution Approach 2:
The patent turns the potential harm of using alternative metals (which may have higher oxidation tendency) into a benefit by implementing protective measures such as protective layers and optimized bonding processes. This converts the risk of oxidation into an opportunity to develop more robust processing techniques that prevent contamination.
3Reliability
If the metal connection member and metal connection pad are bonded under high pressure and temperature, then the electrical connection reliability is improved, but the manufacturing process complexity increases
Solution Approach 1:
The patent optimizes the bonding parameters (pressure, temperature, time) to achieve reliable electrical connections without excessively complex processes. By carefully selecting and adjusting these parameters, the patent maintains connection reliability while keeping the manufacturing process manageable.
Solution Approach 2:
The patent performs preliminary preparation of the metal surfaces before bonding, including cleaning and potential protective layer deposition. This preliminary action ensures that the subsequent bonding process proceeds smoothly with optimal results, reducing the need for complex corrective measures later.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides stable and reliable electrical connections with reduced resistance and manufacturing costs by using alternative metals for the through holes and connection members, preventing interference and contamination, thus enhancing the performance and cost-effectiveness of BAW device packaging.
Implementation Method 1
the metal filled in the first through hole is electrically connected to the first metal layer, and the metal filled in the second through hole is electrically connected to the second metal layer
Implementation Method 2
the metal connection pad is assembled (bonded) to the metal connection member
Data Source
AI summary
A method for manufacturing a semiconductor device includes providing a substrate having a front surface and a back surface, forming first and second through holes in the substrate, filling the first and second through holes with metals, forming a subassembly on the front surface of the substrate. The subassembly includes a first metal layer and a second metal layer insulated from the first metal layer, the first metal layer is electrically connected to the metal filled in the first through hole, the second metal layer is electrically connected to the metal filled in the second through hole, and a metal connection pad is on the substrate and surrounds the subassembly. The method also includes providing a cap assembly including a metal connection member, bonding the cap assembly to the subassembly, and thinning the back surface of the substrate to expose the first and second through holes.