Wafer-Level Solder Bumps via Paste Dipping
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Solution Overview
Problem
Existing semiconductor packaging methods, such as flip-chip technology and through silicon vias (TSVs), face challenges with misalignment and high yield losses due to the use of low-viscosity fluxes, which lack tackiness and are difficult to manage, especially when forming three-dimensional die stacks.
Innovation Solution
A solder dipping process using a paste form of solder bump material is applied to conductive bumps, allowing only the bumps to be embedded in the flux, reducing flux residue and preventing misalignment, and enabling fine-pitch solder joint interconnects through the use of binary and ternary alloys, with conventional pick and place and reflow equipment suitable for high-volume manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If low-viscosity flux is used for solder bump formation, then the flux can be easily deposited, but it lacks tackiness and causes misalignment and high yield losses
Solution Approach 1:
The patent changes the viscosity parameter of the flux from low-viscosity to high-viscosity form. This parameter change provides tackiness for precise alignment while maintaining ease of deposition through the dipping process, resolving the contradiction between operational ease and manufacturing precision.
Solution Approach 2:
The patent introduces a viscosity-modified flux as an intermediary substance between the solder bump material and the substrate. This intermediary flux with optimized viscosity provides both tackiness for alignment and ease of deposition, mediating between the conflicting requirements.
2Ease of manufacture
If conventional evaporation, electroplating or screen printing technologies are used to form solder bumps, then solder bumps can be formed, but additional flux deposition is needed which creates high yield losses due to misalignment
Solution Approach 1:
The patent merges the solder bump formation process with the flux application process into a single dipping operation. By combining these two separate processes (solder bump formation and flux deposition), the patent eliminates the need for additional flux deposition that causes misalignment and yield losses.
Solution Approach 2:
The dipping process serves multiple functions simultaneously: it forms the solder bumps, applies the flux, and ensures proper alignment. This multi-functional approach eliminates the need for separate flux deposition steps that reduce productivity and yield.
3Ease of manufacture
If flux is deposited before die stacking, then solder bumps can be formed, but misalignment occurs due to the thinness and lack of tackiness of the low-viscosity flux
Solution Approach 1:
The patent changes the viscosity parameter of the flux to a higher value, providing tackiness that ensures precise alignment during die stacking. This parameter change maintains solder bump formation capability while eliminating misalignment issues.
4Manufacturing precision
If fine-pitch solder joint interconnects are achieved through solder dipping, then manufacturing precision is improved, but process complexity increases
Solution Approach 1:
The patent uses a specially formulated high-viscosity flux as an intermediary medium in the dipping process. This intermediary enables fine-pitch solder joint formation by providing proper tackiness and alignment, while the overall process remains relatively simple and compatible with conventional equipment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the likelihood of delamination and misalignment, enhances manufacturing efficiency by eliminating the need for a de-flux process, and allows for the formation of high-density three-dimensional die stacks with precise interconnects, improving yield and reliability.
Implementation Method 1
a solder paste dipping process may be performed in which a die... is adapted to a pick and place tool... move die to a reservoir including a solder paste... allowing only the bumps to be embedded in the paste
Implementation Method 2
conventional pick and place and reflow equipment may be used
Data Source
AI summary
In one embodiment, the present invention includes a semiconductor package having a support substrate coupled to a first semiconductor die, where the first semiconductor die includes first conductive bumps, and a second semiconductor die includes second conductive bumps, and where the first and second die are coupled by joints formed of the first and second conductive bumps and a solder material therebetween. Other embodiments are described and claimed.