Wafer Module Orthogonal Mounting for Space Utilization
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Solution Overview
Problem
Conventional fabrication techniques for high density electronic modules, such as wafer-based modules, are limited by inefficient space utilization, particularly for large size electronic modules, which restricts overall integration density.
Innovation Solution
The approach involves orienting electronic modules orthogonal to a mounting surface and encapsulating them with conductive material within a mold compound, allowing for additional modules to be mounted on the surface, thereby reducing the overall volume of the mold compound and substrate dimensions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If electronic modules are mounted in conventional orientations on a mounting surface, then electrical connections can be easily made, but space utilization and integration density are limited
Solution Approach 1:
The patent applies dimensional change by mounting electronic modules in multiple orientations (orthogonal and parallel) relative to the mounting surface, rather than restricting all modules to a single planar orientation. This multi-dimensional arrangement allows more modules to be packed into the same footprint area, improving space utilization and integration density while reducing the overall volume of mold compound required.
Solution Approach 2:
The patent implements nesting by placing electronic modules in overlapping spatial configurations where modules mounted orthogonal to the mounting surface are positioned adjacent to and alongside modules mounted parallel to the surface. This nested-like arrangement maximizes the use of available three-dimensional space within the module package, allowing higher integration density without proportionally increasing the mold compound volume.
2Adaptability or versatility
If large size electronic modules are used to satisfy application requirements, then functional performance is improved, but overall integration density decreases
Solution Approach 1:
By utilizing orthogonal mounting orientations in addition to parallel mounting, the patent effectively uses the third dimension (vertical space) to accommodate large electronic modules. This allows large modules to be integrated without proportionally increasing the horizontal footprint, thereby maintaining higher integration density while still satisfying application requirements for large module sizes.
3Ease of manufacture
If all electronic modules are oriented in the same fashion relative to the mounting surface, then manufacturing is simplified, but space utilization is inefficient
Solution Approach 1:
The patent introduces multiple mounting orientations (orthogonal and parallel) to improve space utilization, which does increase manufacturing complexity but is offset by the use of standardized mounting techniques for each orientation type. The benefit of reduced substrate dimensions and improved space utilization justifies the moderate increase in manufacturing steps, as both orthogonal and parallel mounting are well-established processes.
Data Source
AI summary
Techniques for constructing a wafer based module are provided herein. For example, the techniques include providing a substrate, forming a pattern of conductive material relative to at least one of a surface plane of the substrate and an internal location within the substrate with the pattern of the conductive material including at least an exposed portion, mounting at least one electronic module to the exposed portion of the pattern of the conductive material, orienting the substrate orthogonal relative to a planar mounting surface such that the surface plane of the substrate is substantially orthogonal to the planar mounting surface, mounting one or more additional electronic modules on the planar mounting surface; and forming the semiconductor device by encapsulating the substrate, including the pattern of conductive material, the at least one electronic module and the one or more additional electronic modules within a mold compound.