Semiconductor Wafer Polishing for Flatness Control

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Solution Overview

Problem

Current semiconductor wafer polishing methods, such as CMP and DSP, face challenges in achieving uniform global and local flatness, particularly at the edge region, due to edge roll-off and non-uniform material removal, which affects the usable area and geometry parameters like SFQR, PSFQR, GBIR, and SBIR.

Innovation Solution

A two-stage polishing method where the rear side is CMP polished with a higher removal rate towards the center, followed by CMP of the front side with a higher removal rate near the edge region, using pressure zones to achieve specific material removal profiles that invert the height deviations, thereby improving edge geometry and global flatness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional CMP or DSP polishing is used, then material removal is achieved, but edge roll-off occurs and global and local flatness deteriorate

Engineering Contradiction:

Improveglobal and local flatnessVSAvoidedge roll-off

Core Design Contradiction:

Manufacturing precisionVSEase of operation

Solution Approach 1:

The polishing process is divided into two distinct stages: first polishing the rear side with a convex removal profile (higher removal at center), then polishing the front side with a concave removal profile (higher removal at edges). This segmentation allows each stage to address specific geometric deviations without causing edge roll-off, thereby improving both global and local flatness.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention inverts the conventional polishing approach by first polishing the rear side with a convex profile (opposite to the typical concave profile) to create a compensating geometry, then polishing the front side with a concave profile. This inverted sequence counteracts edge roll-off and achieves superior flatness control.

Inventive Principle:

Principle #13The other way round (Inversion)

2Productivity

If higher material removal rate is used, then productivity increases, but uniformity of material removal decreases leading to non-uniform profile

Engineering Contradiction:

Improvematerial removal rateVSAvoiduniformity of material removal

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The polishing process applies different removal profiles to different regions of the wafer: the rear side receives a convex removal profile with higher removal at the center, while the front side receives a concave removal profile with higher removal at the edges. This local quality approach ensures uniformity of material removal across the entire wafer surface while maintaining high productivity.

Inventive Principle:

Principle #3Local quality

3Area of stationary object

If edge exclusion is reduced to increase usable area, then FQA increases, but control of local flatness in partial sites becomes more difficult

Engineering Contradiction:

Improveusable area FQAVSAvoidlocal flatness in partial sites

Core Design Contradiction:

Area of stationary objectVSManufacturing precision

Solution Approach 1:

The rear side is polished first with a convex removal profile that creates a preliminary geometric compensation. This preliminary action prepares the wafer geometry such that subsequent front side polishing with a concave profile can achieve superior local flatness control in partial sites, enabling reduced edge exclusion while maintaining precision.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method significantly enhances the local and global flatness parameters, even with stringent edge exclusion requirements, by optimizing material removal profiles during CMP processes, resulting in improved geometry without impairing edge geometry, and is economical with total material removal limited to 1.5 μm.

Implementation Method 1

CMP is a single-side polishing that is usually used to reduce the roughness of the front side of a semiconductor wafer. During CMP, the semiconductor wafer is pressed on the side to be polished against a rotating polishing cloth by a rotating polishing head and is smoothed in the presence of a polishing agent supplied.

Methodology Applied

Scientific EffectChemical mechanical polishing:

Implementation Method 2

The material removal brought about during polishing depends, inter alia, on the pressure with which the semiconductor wafer is pressed against the polishing cloth.

Methodology Applied

Scientific EffectAbrasion: Abrasion

Data Source

PatentUSRE44986E1Method for polishing a semiconductor wafer

Publication Date: 2014.07.01 SILTRONIC AG

AI summary

Semiconductor wafers are CMP polished by polishing the rear side of the semiconductor wafer by means of CMP with a material removal with a profile along the diameter of the wafer wherein material removal is higher at the center than at the edge of the rear side; and polishing the front side of the wafer by means of CMP with a material removal with a profile along the diameter of the wafer wherein material removal is lower in the center of the front side than in an edge region of the front side.