Wafer Shape Metrology for TSV Overlay Feed-Forward Correction
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Solution Overview
Problem
Conventional overlay metrology methods for Through Silicon Vias (TSVs) require high-density metrology targets, which interfere with device patterns, and fail to account for wafer-to-wafer variability and bonding-induced distortions, leading to inefficient and time-consuming overlay measurements.
Innovation Solution
A wafer shape metrology system that performs stress-free shape measurements on individual wafers and bonded pairs, using dual interferometry to predict overlay distortions and generate feed-forward corrections for lithographic scanners, eliminating the need for additional processing and targeting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-density metrology targets are used to capture bonding induced distortions, then measurement precision is improved, but device pattern interference increases and manufacturing complexity worsens
Solution Approach 1:
The patent extracts the metrology function from physical overlay targets and transfers it to virtual markers generated from wafer shape measurements. By using dual interferometry to measure wafer shape and computationally deriving overlay distortion, the system eliminates the need for physical metrology targets that would interfere with device patterns, while maintaining high measurement precision through mathematical modeling of bonding-induced distortions.
2Measurement precision
If conventional overlay metrology with multiple processing steps is used, then overlay measurement capability is achieved, but productivity decreases and time consumption increases
Solution Approach 1:
The patent merges the wafer shape measurement and overlay metrology functions into a single dual interferometry measurement process. By simultaneously measuring wafer shape parameters and computing overlay distortion from the same measurement data, the system eliminates separate overlay target measurement steps, thereby maintaining accurate overlay measurement capability while significantly improving productivity and reducing measurement time.
3Manufacturing precision
If feedback control based on prior lot data is used, then lithography correction is achieved, but wafer-to-wafer variability is not accounted for
Solution Approach 1:
The patent applies preliminary action by measuring and characterizing wafer shape parameters before lithography exposure using dual interferometry. By obtaining actual wafer shape data from the specific wafer being processed (rather than relying on prior lot averages), the system can predict bonding-induced overlay distortion for that particular wafer and apply customized feed-forward corrections, thereby accounting for wafer-to-wafer variability while achieving precise lithography correction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables high-resolution, high-throughput overlay metrology without requiring metrology targets on the carrier wafer, optimizing TSV lithography exposure by minimizing distortions and accounting for wafer-to-wafer variability.
Implementation Method 1
using dual interferometry to predict overlay distortions
Data Source
AI summary
A wafer shape metrology system includes a wafer shape metrology sub-system configured to perform stress-free shape measurements on an active wafer, a carrier wafer, and a bonded device wafer. The active wafer includes functioning logic circuitry and the carrier wafer is electrically passive. The wafer shape metrology system includes a controller communicatively coupled to the wafer shape metrology sub-system. The controller is configured to receive stress-free shape measurements; determine overlay distortion between features on the active wafer and the carrier wafer; and convert the overlay distortion to a feed-forward correction for one or more lithographic scanners. The controller is also configured to determine a control range for a bonder or lithography scanner; predict an overlay distortion pattern; calculate an optimal control signature based on a minimal achievable overlay; and provide a feed-forward correction to the bonder or lithography scanner based on the calculated optimal control signature.