Wafer Stack Electrical Connector With Stepped FPCB Termination

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Solution Overview

Problem

Modern electronic systems face challenges with weight and space reduction, as well as environmental sealing, due to the increasing density of cables and the difficulty in terminating flexible printed circuit boards (FPCBs), which are essential for high-speed signal transmission and power distribution in applications like military and aerospace.

Innovation Solution

The development of an electrical connector system that includes a housing with a wafer stack and a flex harness of FPCBs, where each wafer has a dielectric body and a leadframe with conductors, featuring a stepped interface for direct soldering and efficient termination, allowing for customizable and scalable connections that reduce weight and space while maintaining signal integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If cables are used to connect backplane and daughter cards, then electrical connection is established, but weight and space increase

Engineering Contradiction:
Improveelectrical connectionVSAvoidsystem weight
Core Design Contradiction:
ReliabilityVSWeight of moving object

Solution Approach 1:

The patent extracts the cable from the system by implementing direct rigid board-to-board connections through the wafer stack architecture, eliminating the need for intermediate cable connections while maintaining electrical connectivity between backplane and daughter cards

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements nested integration by stacking multiple wafers vertically within a compact housing, with each wafer containing multiple conductors that are vertically staged to connect different circuit boards, achieving high-density integration without increasing external dimensions

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If cables are used to connect backplane and daughter cards, then electrical connection is established, but space occupation increases

Engineering Contradiction:
Improveelectrical connectionVSAvoidsystem volume
Core Design Contradiction:
ReliabilityVSVolume of moving object

Solution Approach 1:

The patent implements nested integration by stacking multiple wafers vertically within a compact housing, with each wafer containing multiple conductors that are vertically staged to connect different circuit boards, achieving high-density integration without increasing external dimensions

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent transitions from horizontal cable routing to vertical stacking architecture, utilizing the vertical dimension (Z-axis) to organize multiple conductors and wafers, thereby reducing the horizontal footprint and overall system volume

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Weight of moving object

If flexible printed circuit boards are used instead of cables, then weight and space are reduced, but termination difficulty increases

Engineering Contradiction:
Improvesystem weightVSAvoidtermination ease
Core Design Contradiction:
Weight of moving objectVSEase of manufacture

Solution Approach 1:

The patent applies preliminary action by pre-organizing conductors into vertically staged arrays within each wafer before final assembly, with conductors already positioned at predetermined locations corresponding to specific circuit board connections, eliminating the need for complex post-assembly termination work

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces the wafer stack as an intermediary component between the backplane and daughter cards, providing a standardized interface that simplifies connections through pre-configured vertical conductor staging, making the system more manufacturable than direct FPCB-to-board connections

Inventive Principle:
Principle #24Intermediary (Mediator)

4Ease of manufacture

If traces are fanned outward at FPCB interface, then space for all traces/pads is provided, but FPCB size increases

Engineering Contradiction:
Improvetrace packagingVSAvoidFPCB interface area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent resolves the trace packaging problem by transitioning from horizontal fan-out layout to vertical stacking architecture, where multiple traces are arranged in the vertical dimension (Z-axis) through stacked wafers, allowing dense trace packaging without increasing the horizontal interface area of the FPCB

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9570861B2Electrical connector having flexible printed circuit board termination
Publication Date: 2017.02.14 TE CONNECTIVITY SOLUTIONS GMBH
  • US9570861B2 patent drawing
  • US9570861B2 patent drawing
  • US9570861B2 patent drawing

AI summary

An electrical connector includes a housing having a cavity and a wafer stack received in the cavity. The wafer stack includes a plurality of electrical wafers arranged parallel to each other within the cavity. Each wafer includes a dielectric body and a leadframe having plural conductors held in the dielectric body, the conductors having terminating contacts and mating contacts with leads therebetween. The terminating contacts are both horizontally staged and vertically staged and exposed in a pocket of the dielectric body for electrical termination. The mating contacts being exposed for electrical connection. The electrical connector includes a flex harness includes a plurality of FPCBs. The FPCBs are electrically connected to corresponding wafers. Each FPCB has a stepped mating interface with conductors along the stepped mating interface configured to be electrically connected to corresponding terminating contacts.