Wafer Support Sagging for Edge Seal in ALD

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Solution Overview

Problem

Backside deposition during semiconductor processing, particularly in atomic layer deposition, leads to alignment and focusing issues in lithography, requiring re-adjustment of lithography tools and increasing processing time due to unwanted film deposition on the wafer's backside.

Innovation Solution

A pedestal system with wafer supports configured to extend from the pedestal, symmetrically arranged about the central axis, contacts the wafer's backside to support it above the wafer-facing surface, positioning the outer edge to sag and contact a surface opposite the backside, forming an edge seal that limits access by process gases, thereby reducing backside deposition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the wafer is supported close to the pedestal surface, then good electrical contact and thermal coupling are achieved, but process gases can access the backside and deposit unwanted film

Engineering Contradiction:
Improveelectrical contact and thermal couplingVSAvoidbackside deposition
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent introduces an intermediary gas barrier layer between the wafer backside and the pedestal surface. This layer allows the wafer to maintain close proximity for good electrical and thermal contact while preventing process gases from reaching and depositing on the wafer backside, thus resolving the contradiction between reliable contact and preventing harmful deposition

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs a thin film or shell structure as the gas barrier layer on the wafer backside. This thin film provides effective gas blocking while maintaining the wafer's close proximity to the pedestal, enabling both reliable electrical/thermal contact and prevention of backside deposition

Inventive Principle:
Principle #30Flexible shells and thin films

2Object-generated harmful factors

If the wafer is elevated above the pedestal surface, then backside deposition is reduced, but electrical contact and thermal coupling deteriorate

Engineering Contradiction:
Improvebackside depositionVSAvoidelectrical contact and thermal coupling
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The gas barrier layer acts as an intermediary that enables the wafer to be elevated slightly above the pedestal surface while maintaining effective electrical and thermal coupling. The barrier layer fills the gap and provides continuous contact paths for heat and electricity while blocking gas access

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If backside deposition occurs, then alignment and focusing precision in lithography is maintained, but lithography tools require re-adjustment and processing time increases

Engineering Contradiction:
Improvealignment and focusing precisionVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies preliminary anti-action by preventing backside deposition before it can occur during the deposition process. The gas barrier layer blocks process gases from reaching the wafer backside, thereby preventing the formation of unwanted film that would subsequently require lithography re-adjustment and cause productivity loss

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively minimizes backside deposition, reducing the need for re-adjustment of lithography tools and decreasing processing time by creating a barrier that prevents process gases from reaching the wafer's backside during deposition, ensuring more precise and efficient film deposition on the frontside.

Implementation Method 1

positioning the one or more wafer supports to a height above the wafer-facing surface to cause an outer edge of the wafer to sag and substantially contact a surface of the apparatus opposite the backside of the wafer

Methodology Applied
Scientific EffectGravity-induced sag: Gravitation

Implementation Method 2

forming an edge seal that limits access by process gases, thereby reducing backside deposition

Methodology Applied
Scientific EffectPhysical barrier sealing: Physical Containment

Implementation Method 3

precursor gases can be directed to a wafer and the precursor gases can chemisorb onto a surface of the wafer to form a monolayer

Methodology Applied
Scientific EffectChemisorption: Chemisorption

Data Source

PatentUS9428833B1Method and apparatus for backside deposition reduction by control of wafer support to achieve edge seal
Publication Date: 2016.08.30 LAM RES CORP
  • US9428833B1 patent drawing
  • US9428833B1 patent drawing
  • US9428833B1 patent drawing

AI summary

Method and apparatus for reducing backside deposition by controlling one or more wafer supports are disclosed. A processing chamber, such as a processing chamber for atomic layer deposition, can include a pedestal and one or more wafer supports configured to extend from the pedestal. A wafer can be provided over the pedestal, the one or more wafer supports can contact the backside of the wafer to support the wafer, and the one or more wafer supports can be positioned to a height to cause an outer edge of the wafer to sag. The outer edge of the wafer can sag to substantially contact the pedestal or a carrier ring surrounding the pedestal. This can create an edge seal to limit access by process gases to the backside of the wafer during a deposition process.