Waiver Geometric Elements for IC Layout Verification
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Solution Overview
Problem
In the electronic design automation process for integrated circuits, false errors detected during physical verification often require repetitive waivers, leading to inefficiencies and increased complexity when designs need to be shared among different entities, as each entity must verify and potentially waive the same errors independently.
Innovation Solution
The implementation of error waiver techniques allows designers to record and apply waiver geometric elements associated with specific verification rules, enabling the masking of false errors in subsequent checks and facilitating the creation of waiver regions based on pattern matching or layout markers, thereby streamlining the design verification process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If designers manually verify and waive false errors independently for each design entity, then verification accuracy is maintained, but time consumption and process complexity increase significantly
Solution Approach 1:
The patent creates a database that stores verified design data and waiver information from previous designs. When a new design is verified, the system automatically searches for matching patterns in the database and applies pre-verified waivers, eliminating the need for manual re-verification of false errors across different design entities
Solution Approach 2:
The verification system automatically identifies false errors by comparing current design patterns against stored reference data in the database. The system autonomously determines which errors should be waived based on pattern matching, reducing the need for manual intervention while maintaining verification accuracy
2Reliability
If each design entity performs independent verification, then verification thoroughness is ensured, but the complexity of managing multiple verification processes increases
Solution Approach 1:
The patent creates a universal verification system that handles multiple design entities through a single integrated database. The database stores verification results and waiver information that can be applied across different design entities, allowing one system to serve multiple verification needs without increasing complexity
Solution Approach 2:
The verification process is segmented into automated pattern recognition, database searching, and waiver application stages. By dividing the complex verification process into discrete automated steps, the system maintains thoroughness while reducing overall complexity through automation
3Adaptability or versatility
If false errors are repeatedly waived across different designs, then design flexibility is maintained, but the burden of error management increases
Solution Approach 1:
The database stores previously verified design patterns and their associated waivers. When similar patterns appear in new designs, the system automatically retrieves and applies the same waivers, maintaining design flexibility while eliminating the repetitive burden of manual error management through pattern copying
Solution Approach 2:
The system provides feedback by automatically identifying false errors through pattern matching and applying appropriate waivers based on stored verification history. This feedback mechanism reduces the error management burden by automatically handling flexible design decisions that would otherwise require manual intervention
Data Source
AI summary
When a designer designates one or more errors identified in layout design data as false errors, waiver geometric elements corresponding to the designated false errors are created and added to the design. The waiver geometric element may be associated with a verification rule that generated its corresponding false error. When the design is subsequently analyzed using those verification rules in another verification rule check process, the waiver geometric elements are examined, and used to mask those errors associated with a waiver geometric element that would otherwise be displayed to the designer. A designer may also designate a waiver region based on pattern matching, cell names or layout markers in which layout region one or more verification rules may be inapplicable. A waiver region identification item for the waiver region may be associated with a waiver geometric element and the one or more verification rules.