Watchdog Timer Self-Diagnosis During Semiconductor Operation
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Solution Overview
Problem
Existing semiconductor devices with watchdog timers cannot perform fault diagnosis during actual operation, which is a concern for functional safety, especially in vehicles.
Innovation Solution
Incorporating a watchdog timer with a counter, counter control circuit, and fault diagnosis module that includes a suppressing circuit and a holding circuit to allow fault diagnosis during operation by masking and holding reset and interrupt signals, enabling self-diagnosis without disrupting normal operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a watchdog timer is implemented without fault diagnosis capability, then the device complexity is reduced, but the functional safety and reliability are compromised
Solution Approach 1:
The fault diagnosis function is merged with the existing watchdog timer circuit by integrating a suppressing circuit and holding circuit into the same module. This allows fault diagnosis capability to be added without creating a separate redundant system, thereby improving reliability while minimizing the increase in device complexity.
Solution Approach 2:
The watchdog timer performs self-diagnosis through the suppressing circuit that detects whether the reset signal is generated normally during the refresh period. The system monitors its own operation without requiring external diagnostic equipment, enabling the device to service itself and maintain high reliability with minimal additional complexity.
2Reliability
If fault diagnosis is performed during actual operation, then the reliability is improved, but the device complexity increases due to additional circuits
Solution Approach 1:
The watchdog timer is segmented into functional modules: a counter, a counter control circuit, a suppressing circuit, and a holding circuit. This segmentation allows the fault diagnosis function to be implemented through specific modular components rather than redesigning the entire system, thereby improving reliability while controlling the increase in device complexity.
Solution Approach 2:
The holding circuit acts as an intermediary that stores the reset signal state during the refresh period, enabling fault diagnosis without disrupting the normal operation of the watchdog timer. This intermediary component allows the system to maintain reliability while adding diagnostic capability with minimal impact on overall circuit structure.
3Measurement precision
If the reset signal is suppressed during refresh period, then fault diagnosis accuracy is improved, but the loss of information increases
Solution Approach 1:
The suppressing circuit is activated in advance during the refresh period to prevent the reset signal from being output to external terminals. This preliminary action ensures that fault diagnosis can be performed accurately by capturing the reset signal state before it is lost, thereby improving measurement precision while temporarily controlling information loss through the holding circuit.
Solution Approach 2:
The holding circuit provides beforehand cushioning by storing the reset signal state during the refresh period when the signal would otherwise be lost. This prepares the system to retain critical information temporarily, allowing fault diagnosis to proceed with high accuracy without permanent loss of diagnostic information.
Data Source
AI summary
The aim of the present disclosure is to provide a watchdog timer that can perform a fault diagnosis during the actual use of a semiconductor device. In a semiconductor device provided with a watchdog timer, the watchdog timer includes a counter; a counter control circuit that changes a count value of the counter to a desired value in the refresh period of the count value; and a fault diagnosis module. The fault diagnosis module includes a suppressing circuit that suppresses generation of a reset signal to the exterior of the watchdog timer in the refresh period; and a holding circuit that holds the reset signal.


