Semiconductor Optical Waveguide Electric Isolation Tunnel

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Solution Overview

Problem

Existing methods for increasing electric isolation between components in integrated semiconductor optical waveguiding devices, such as SOA components and IQM-type modulators, face challenges including excessive circuit size, optical transition losses, and insufficient P-dopant diffusion in N-doped layers, which affect the quality and efficiency of the devices.

Innovation Solution

A method involving a material stack with a high resistivity InP substrate layer, a conductive layer with enhanced conductivity, and an etch-guiding layer, where the conductive layer is easily wet etched in the height direction and the etch-guiding layer in the lateral direction, allowing for the formation of a through tunnel for efficient electric isolation through a two-step etching process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the longitudinal length of the waveguide is increased to achieve high electric isolation between components, then electric isolation is improved, but circuit size increases and optical loss increases

Engineering Contradiction:
Improveelectric isolationVSAvoidcircuit size
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent transitions from achieving electric isolation through longitudinal waveguide separation (one dimension) to achieving it through lateral tunnel formation beneath the waveguide (another dimension). The tunnel is created by etching through the N-doped lower layer in the vertical direction, providing electric isolation without requiring increased longitudinal separation between components.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the N-doped lower layer by creating a tunnel that divides it into isolated regions beneath different waveguide sections. This segmentation breaks the continuous conductive path in the vertical direction, achieving electric isolation between components without affecting the longitudinal waveguide structure.

Inventive Principle:
Principle #1Segmentation

2Reliability

If semi-insulating substrates with etching through grown layers are used for electric isolation, then electric isolation is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improveelectric isolationVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating isolation tunnels only in specific locations beneath the waveguide where electric isolation is needed, rather than using a uniform semi-insulating substrate approach. The tunnel depth and position are locally optimized to provide isolation while maintaining manufacturing simplicity.

Inventive Principle:
Principle #3Local quality

3Reliability

If diffused P-doping is applied to N-doped lower layers for isolation, then electric isolation is improved, but additional epitaxial steps are required and surface topography becomes non-planar

Engineering Contradiction:
Improveelectric isolationVSAvoidepitaxial steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent converts the heavy N-doping in the lower layer, which normally prevents effective P-dopant diffusion, into a benefit by using this same heavily doped layer as the target for tunnel formation. The heavy doping ensures good electrical contact where needed while the tunnel removal provides isolation where required, eliminating the need for additional epitaxial steps.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach provides reliable and deterministic electric isolation with reduced optical losses and surface topography issues, enabling the formation of a tunnel close to the waveguiding core with high resistance between different points along the waveguide, improving device performance and efficiency.

Implementation Method 1

which conductive layer can be wet etched more easily in the height direction than in the lateral direction

Methodology Applied
Scientific EffectWet etching:

Implementation Method 2

an etch-guiding layer made from a material which can be etched in the lateral direction more easily than what is the case for the material of the conductive layer

Methodology Applied
Scientific EffectWet etching:

Implementation Method 3

reduce the conductivity of N-doped layers situated beneath the waveguiding layers, using diffused P-doping in such N-doped layers

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS10605989B2Method of manufacturing an integrated semiconductor optical waveguiding device
Publication Date: 2020.03.31 II VI DELAWARE INC
  • US10605989B2 patent drawing
  • US10605989B2 patent drawing
  • US10605989B2 patent drawing

AI summary

A method of manufacturing an integrated semiconductor optical waveguiding device comprising an elongated waveguide, the method comprising:providing a material stack comprising a substrate layer, an anisotropically wet etchable conductive layer, a waveguiding core layer, an etch-guiding layer between the substrate layer and the waveguiding core layer, and InP material between the etch-guiding layer and the waveguiding core layer;etching said material stack down to and including said waveguiding core layer, to form an elongated shape of the elongated waveguide together with an etched area laterally beside the waveguide;providing an etch mask material across the formed waveguide; andwet etching parts of said etched areas that are not protected by the etch mask, to remove material of the etch-guiding layer across a lateral direction of the waveguide, forming a laterally extending through tunnel in the etch-guiding layer and in the conductive layer.