Memory Structure With Targeted Refresh for Weak-Cell Retention
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Solution Overview
Problem
The problem of memory cell failure, particularly in DRAMs, becomes more severe with miniaturization, leading to an increase in weak cells with shortened retention times, and current repair methods like redundancy addresses, increased refresh rates, and merged word lines introduce negative effects such as resource shortages and capacity loss.
Innovation Solution
A memory structure that includes a refresh address storing circuit to store supplementary refresh addresses for weak cells, subdividing row hammer refresh windows into first and second windows, and cyclically performing refresh operations to maintain data integrity in weak cells, avoiding negative effects from repair.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundancy addresses are used to repair weak cells, then memory cell reliability is improved, but memory capacity is reduced
Solution Approach 1:
The patent segments the refresh operation into two distinct parts: standard refresh for normal cells and supplementary refresh for weak cells. The refresh address storing circuit is divided into a standard refresh address storing circuit and a supplementary refresh address storing circuit, allowing independent management of refresh operations for different cell types without interfering with overall memory capacity.
2Reliability
If refresh rate is increased to maintain weak cells, then retention time is improved, but power consumption increases
Solution Approach 1:
The patent applies local quality by providing differentiated refresh operations: standard refresh for normal memory cells and supplementary refresh specifically for weak cells. The supplementary refresh address storing circuit stores only the addresses of weak cells, enabling targeted refresh operations that extend retention time for vulnerable cells without increasing the refresh rate for the entire memory array, thus avoiding excessive power consumption.
3Reliability
If merged word lines are used for repair, then weak cell retention is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements preliminary action by pre-storing the addresses of weak cells in the supplementary refresh address storing circuit during manufacturing or initialization. This allows the system to automatically identify and refresh weak cells without requiring complex real-time detection mechanisms or merged word line structures, thereby improving weak cell retention while maintaining relatively simple manufacturing processes.
Data Source
AI summary
A memory structure includes: a refresh address storing circuit, disposed in a memory controller and configured to store supplementary refresh addresses; and refresh registers, each refresh register being disposed in each memory block of the plurality of memory blocks; where in a power-on process of the memory structure, the refresh address storing circuit transmits the supplementary refresh address to the corresponding refresh register; and each memory block is configured to: during row hammer refresh, perform refresh of a row hammer address based on a first refresh window and a row hammer refresh flag, or perform refresh of the supplementary refresh address based on a second refresh window and a supplementary refresh flag, where the first refresh window and the second refresh window are allocated based on a row hammer refresh window, and a proportion of the first refresh window to the second refresh window is a first preset value.