Semiconductor Well Border Layout for High-Voltage Leak Blocking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge of ensuring high voltage input in semiconductor devices while maintaining reliability, particularly in advanced technologies like 2 nm or above, where supply voltages are typically limited to low levels due to thin gate oxides and spacers, leading to potential current leaks.
Innovation Solution
The implementation of dummy metal gate and metal-to-diffusion layers that act as barriers, blocking higher supply voltages (e.g., 1.8 V) from reaching the well, thereby preventing current leaks by maintaining a safe distance and allowing these structures to be floating or connected via inner routings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If higher supply voltage is applied to ensure high voltage input for critical design, then voltage input capability is improved, but current leaks occur due to thin gate oxide and side wall spacer
Solution Approach 1:
The device is segmented into multiple regions with different voltage requirements. A first region contains the thin gate oxide and side wall spacer structures optimized for low voltage operation, while a second region is specifically designed to receive higher supply voltage. This segmentation allows different parts of the device to operate at different voltages simultaneously, enabling high voltage input capability without compromising the reliability of voltage-sensitive regions.
Solution Approach 2:
Different regions of the device are assigned different structural qualities appropriate for their voltage requirements. The first region has thin gate oxide and side wall spacer with specific dimensional characteristics optimized for low voltage, while the second region has structural characteristics (such as thicker dimensions or different material composition) optimized for high voltage operation. This local differentiation of structural quality allows the device to handle both low and high voltage conditions appropriately in different locations.
2Reliability
If supply voltage is limited to low level for reliability concern, then current leak is prevented, but high voltage input requirement cannot be met
Solution Approach 1:
The device is divided into voltage-zone segments where each segment can independently handle specific voltage levels. The first region maintains low voltage operation for reliability, while the second region accepts high voltage input when needed. This segmentation provides adaptability to different voltage requirements while maintaining reliability in voltage-sensitive regions.
Solution Approach 2:
The device structure is designed to perform multiple voltage-level functions within a single device architecture. The same device can operate in low voltage mode for normal operation and switch to high voltage mode when critical design requirements demand it. The multi-functional design allows the device to adapt to different voltage input requirements while maintaining reliability through appropriate structural configurations in different regions.
Data Source
AI summary
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a well, a plurality dummy elements, at least one source/drain diffusion region, at least one metal-to-diffusion (MD) layer and at least one metal gate (MG) layer. The plurality dummy elements are formed in or on a border area of the well. The at least one source/drain diffusion region is formed in the well and located at outside of the border area of the well. The at least one metal-to-diffusion layer is disposed on the source/drain diffusion region and located at outside of the border area of the well. The at least one metal gate layer is disposed adjacent to the metal-to-diffusion layer and located at outside of the border area of the well. The plurality of dummy elements are floating.