Wimpy Transistor Stack with Thick Intergate Insulator for Leakage Reduction
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Solution Overview
Problem
Existing integrated circuit devices face challenges in reducing leakage current and power consumption, particularly in multi-channel transistor structures where process complexity is high and channel width changes are restricted.
Innovation Solution
The implementation of a wimpy transistor stack configuration, where the thickness of the source/drain isolation layer or the intergate insulator is adjusted to electrically isolate channels, reducing current flow and thereby minimizing leakage current and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the thickness of the intergate insulator is increased to electrically isolate channels in the wimpy transistor stack, then leakage current and power consumption are reduced, but device complexity increases
Solution Approach 1:
The patent applies local quality by differentiating the intergate insulator thickness between two adjacent transistor stacks. The wimpy transistor stack has a first intergate insulator with greater thickness than the second intergate insulator in the reference transistor stack. This localized variation allows selective electrical isolation of channels in the wimpy stack to reduce leakage current and power consumption, while maintaining normal operation in the reference stack, without requiring complex process changes across the entire device.
2Loss of energy
If the thickness of the source/drain isolation layer is increased to electrically isolate channels, then leakage current is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent implements local quality by varying the source/drain isolation layer thickness specifically in the wimpy transistor stack region. The first source/drain isolation layer has greater thickness than the second source/drain isolation layer in the reference stack. This localized thickness variation provides electrical isolation of channels to reduce leakage current while avoiding the need for complex manufacturing processes across the entire device structure.
3Loss of energy
If channel width is changed to reduce current flow, then power consumption is reduced, but adaptability is restricted
Solution Approach 1:
The patent applies parameter changes by modifying the thickness of the intergate insulator and source/drain isolation layer as the controlling parameter instead of changing channel width. By increasing the first intergate insulator thickness and first source/drain isolation layer thickness in the wimpy transistor stack, the patent achieves reduced current flow and power consumption while maintaining the original channel width design. This approach preserves adaptability and versatility because channel width can still be optimized for performance requirements without being constrained by power reduction needs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces leakage current and power consumption by lowering current flow through the wimpy transistor stack without significantly increasing process complexity or altering the existing design.
Implementation Method 1
the first intergate insulator overlaps a lowermost one of the plurality of second upper channel regions and/or an uppermost one of the plurality of second lower channel regions in the horizontal direction
Data Source
AI summary
An integrated circuit device includes a wimpy transistor stack and a reference transistor stack on a substrate. The wimpy transistor stack may include a first intergate insulator that is thicker than a second intergate insulator of the reference transistor stack. Due to the thicker first intergate insulator, a number of first upper channel regions of the wimpy transistor stack may be less than a number of second upper channel regions of reference transistor stack, and/or a number of first lower channel regions of the wimpy transistor stack may be less than a number of second lower channel regions of the reference transistor stack.