Wimpy Transistor Stack With Thick Isolation for Lower Leakage
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Solution Overview
Problem
Existing integrated circuit devices face challenges in reducing leakage current and power consumption, particularly in multi-channel transistor structures where process complexity is high and changing channel width is restricted.
Innovation Solution
The implementation of a 'wimpy transistor' stack configuration, where the thickness of the source/drain isolation layer or the intergate insulator is adjusted to electrically isolate channels, reducing current flow and thus leakage current and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a thin intergate insulator is used in conventional transistor stacks, then more upper and lower channel regions can be formed, but the source/drain isolation layer becomes too thin and cannot provide adequate isolation
Solution Approach 1:
The patent changes the thickness parameter of the intergate insulator from conventional thin (e.g., 10-20 nm) to thick (e.g., 50-100 nm or more). This parameter change allows the source/drain isolation layer to be formed with sufficient thickness (e.g., 50-200 nm) to provide adequate isolation, while still enabling the formation of multiple upper and lower channel regions through subsequent etching processes.
2Reliability
If the source/drain isolation layer is made thick to provide adequate isolation, then isolation performance improves, but the manufacturing process becomes more complex
Solution Approach 1:
The patent performs preliminary actions by forming the thick intergate insulator layer before forming the source/drain isolation layer. This preliminary thick intergate insulator serves as a protective and structural foundation that simplifies subsequent processing steps. The thick intergate insulator is formed first, then the source/drain isolation layer is formed over it, and finally selective etching is performed to create the channel regions. This sequence of preliminary actions reduces overall process complexity compared to attempting to form thick isolation layers after all other structures are in place.
3Ease of manufacture
If conventional thin intergate insulator is used, then manufacturing process is simpler, but the source/drain isolation layer cannot be formed with sufficient thickness
Solution Approach 1:
The patent performs preliminary actions by forming the thick intergate insulator layer before forming the source/drain isolation layer. This preliminary thick intergate insulator serves as a protective and structural foundation that simplifies subsequent processing steps. The thick intergate insulator is formed first, then the source/drain isolation layer is formed over it, and finally selective etching is performed to create the channel regions. This sequence of preliminary actions reduces overall process complexity compared to attempting to form thick isolation layers after all other structures are in place.
Data Source
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AI summary
An integrated circuit device includes a wimpy transistor stack (TSw_4) and a reference transistor stack (TS) on a substrate (100). The wimpy transistor stack (TSw_4) may include a first intergate insulator (305a) that is thicker than a second intergate insulator (t10) of the reference transistor stack (TS). Due to the thicker first intergate insulator 305a, a number of first upper channel regions (402a) of the wimpy transistor stack (TSw_4) may be less than a number of second upper channel regions (402b) of reference transistor stack (TS), and/or a number of first lower channel regions (202a) of the wimpy transistor stack (TSw_4) may be less than a number of second lower channel regions (202b) of the reference transistor stack (TS).