Wire Bond Via Package Stacking for Small-Pitch Microcontacts

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing technologies face challenges in forming microcontacts with high aspect ratios and small pitch, limiting the configuration and density of microelectronic packages.

Innovation Solution

A microelectronic package design featuring a substrate with exposed conductive elements and wire bonds with encapsulated bases and unencapsulated tips, allowing for flexible interconnect configurations and increased packaging density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching processes are used to form microcontacts, then the manufacturing process is simple, but the aspect ratio and pitch of microcontacts are limited

Engineering Contradiction:
Improvemicrocontact aspect ratio and pitchVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent replaces conventional etching processes with a wire bonding process that uses mechanical deposition to form conductive structures. Wire bonds are deposited through openings in the substrate to create microcontacts, enabling high aspect ratios and small pitches that cannot be achieved through etching alone. This mechanical substitution resolves the contradiction by achieving superior manufacturing precision without excessive process complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the fundamental parameters of microcontact formation by transitioning from subtractive etching to additive wire bonding. This allows control over aspect ratio and pitch through wire bond geometry and placement parameters rather than being constrained by etching process limitations. The parameter change enables achieving aspect ratios and pitches beyond conventional capabilities.

Inventive Principle:
Principle #35Parameter changes

2Area of stationary object

If chip scale packages are used to reduce assembly area, then the package footprint is minimized, but interconnect flexibility and density are constrained

Engineering Contradiction:
Improvepackage footprintVSAvoidinterconnect configuration flexibility
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent segments the interconnect structure into multiple components: wire bonds for flexible routing, conductive elements for electrical connection, and encapsulation layers for protection. This segmentation allows the package to maintain a compact footprint while providing versatile interconnect configurations through the flexible wire bond segments that can be routed as needed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes the vertical dimension by forming wire bonds that extend through the substrate thickness, creating microcontacts with high aspect ratios. This three-dimensional approach allows compact footprint while maintaining interconnect flexibility, as wires can be routed vertically and laterally to achieve complex connections within a small planar area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If stacked package arrangements are used to increase device density, then the footprint is reduced, but mechanical and electrical connection reliability becomes more challenging

Engineering Contradiction:
Improvedevice densityVSAvoidinterconnection reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent employs composite structures combining wire bonds, conductive elements, and encapsulation materials to create reliable stacked package interconnections. The wire bonds provide mechanical strength and electrical conductivity, while the encapsulation layers provide protection and structural support. This composite approach enhances connection reliability in stacked arrangements by distributing mechanical and electrical functions across multiple materials.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent incorporates encapsulation layers that protect wire bonds and conductive elements before they are subjected to mechanical and electrical stresses. This protective cushioning is built into the structure beforehand, shielding the delicate interconnections in stacked packages from damage and ensuring long-term reliability under operational conditions.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design enables the formation of microelectronic packages with improved mechanical and electrical connectivity, facilitating high-density interconnects and enhanced operational speeds.

Implementation Method 1

wire bonds having bases bonded to respective ones of the conductive elements

Methodology Applied
Scientific EffectWire bonding: Welding

Data Source

PatentUS12211821B2Package-on-package assembly with wire bond vias
Publication Date: 2025.01.28 ADEIA SEMICON TECH LLC
  • US12211821B2 patent drawing
  • US12211821B2 patent drawing
  • US12211821B2 patent drawing

AI summary

A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.