Wire Density-Aware Layer Assignment for IC Routing Congestion

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Solution Overview

Problem

Conventional layer assignment methods in integrated circuit (IC) design fail to account for wire density, leading to poor wire distribution and timing degradations due to coupling capacitance and congestion in certain layers.

Innovation Solution

Perform wire density-aware layer assignment by generating a multi-layer density map based on single-layer routing and initial layer assignment, and performing incremental layer reassignment to optimize wire distribution across layers, using a computing device to update the IC design data with the results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional layer assignment methods are used, then the routing process is simple, but wire distribution is poor and timing degradations occur due to coupling capacitance and congestion

Engineering Contradiction:
Improvewire distributionVSAvoidlayer assignment complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent performs preliminary wire density estimation and layer assignment before final routing. A multi-layer density map is generated in advance based on initial routing estimates, and layers are assigned considering future density implications. This preliminary action prevents congestion and timing issues before they occur during actual routing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent transitions from traditional 2D layer assignment to a 3D multi-layer density-aware assignment approach. By considering wire density across multiple layers simultaneously and assigning nets to optimal layers based on density maps, the system adds a vertical dimension optimization that improves wire distribution and reduces coupling capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If wires are concentrated in certain layers, then routing is easier, but coupling capacitance increases causing timing degradations

Engineering Contradiction:
Improverouting easeVSAvoidtiming performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies different layer assignments to different regions of the circuit based on local wire density characteristics. The density map is divided into regions, and each region's nets are assigned to layers that optimize local density distribution. This local quality approach ensures that high-density regions use layers that minimize coupling capacitance while maintaining routing ease.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the layer assignment parameter dynamically based on wire density measurements. Instead of fixed layer assignment, the system adjusts which layer each net uses based on the density map, transforming the layer index parameter according to local density conditions to balance routing ease with timing performance.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If single-layer routing is used, then the routing process is simpler, but wire density congestion occurs in certain layers

Engineering Contradiction:
Improverouting process complexityVSAvoidwire density
Core Design Contradiction:
Device complexityVSQuantity of substance

Solution Approach 1:

The patent segments the routing problem into multiple layers from the planning stage. Instead of attempting to route all wires on a single layer, the system divides the wire population across multiple layers based on density considerations. Each layer handles a specific portion of the total wire count, preventing congestion while maintaining manageable complexity for each individual layer.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent resolves wire density congestion by transitioning from 2D single-layer routing to 3D multi-layer routing. By distributing wires across multiple vertical layers according to the density map, the system effectively adds a vertical dimension to wire distribution, reducing horizontal congestion on any single layer while maintaining overall routing simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12393760B1Wire density-aware layer assignment
Publication Date: 2025.08.19 CADENCE DESIGN SYST INC
  • US12393760B1 patent drawing
  • US12393760B1 patent drawing
  • US12393760B1 patent drawing

AI summary

Aspects of the present disclosure address systems and methods for density-aware layer assignment for integrated circuit (IC) designs. Data describing an IC design is accessed. The IC design comprises a net and a set of routing layers. Single-layer routing and an initial layer assignment is performed on the set of nets. The single-layer routing and the initial layer assignment comprises generating a route for a net from the set of nets and assigning the route to one or more layers from the set of layers. A multi-layer density map is generated based on the single-layer routing and the initial layer assignment on the set of nets. Incremental layer reassignment is performed on the set of nets based on the multi-layer density map. The incremental layer assignment comprises reassigning a segment of the route from the first layer to a second layer from the set of layers based on the density value.