Wire Stud Vertical Interconnects in Fan-Out Wafer Level Packages
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Solution Overview
Problem
The formation of conductive vias in semiconductor devices is time-consuming and expensive, and can lead to delamination issues during the manufacturing process of vertical interconnects in fan-out wafer level packages (Fo-WLPs).
Innovation Solution
A method involving the formation of wire studs with a base and stem as vertical interconnects, where the wire studs are integrated into the packaging process, allowing for a simpler and cost-effective vertical interconnect structure by depositing an encapsulant over the substrate and wire studs, and forming an interconnect structure that reduces the risk of delamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive vias are formed through encapsulant to create vertical interconnects, then electrical connection between topside and bottom side interconnect structures is achieved, but the manufacturing process becomes time-consuming and expensive
Solution Approach 1:
Wire studs are formed prior to encapsulant deposition, establishing vertical interconnect pathways before the encapsulant is applied. This preliminary formation of conductive structures eliminates the need for subsequent via drilling and filling operations, significantly reducing manufacturing time and cost while maintaining reliable electrical connections
Solution Approach 2:
Instead of forming vias through the encapsulant after it is deposited (conventional approach), the invention inverts the sequence by first forming wire studs on the substrate surface, then depositing the encapsulant over them. This reversal of the conventional process sequence simplifies manufacturing and reduces complexity
2Reliability
If conductive vias are formed through encapsulant, then vertical interconnect is achieved, but delamination occurs resulting in manufacturing defects
Solution Approach 1:
Wire studs are formed and established as stable conductive structures before encapsulant deposition. This preliminary establishment of robust wire stud foundations prevents delamination issues that occur when vias are formed through the encapsulant later, as the wire studs provide strong mechanical and electrical anchoring points
Solution Approach 2:
The invention converts the potential harm of delamination into a benefit by using wire studs that are inherently more resistant to delamination than vias. The wire stud structure, with its base portion embedded in the substrate and stem extending through the encapsulant, actually prevents the delamination problems that plague conventional via-based interconnects
3Reliability
If complex via formation processes are used for vertical interconnects, then electrical connection is achieved, but manufacturing cost increases
Solution Approach 1:
Wire studs are formed in advance using simple deposition and patterning techniques before encapsulant application. This preliminary formation avoids complex via drilling, cleaning, and filling operations, significantly reducing manufacturing cost while maintaining reliable electrical connections through the wire stud structure
Solution Approach 2:
The wire stud structure uses simpler, more cost-effective materials and formation processes compared to conventional vias. The wire studs serve their interconnect function reliably without requiring the expensive equipment and multiple process steps needed for via formation, making the overall manufacturing process more economical
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces costs, and minimizes delamination issues in the vertical interconnect structure of Fo-WLPs, enabling more efficient production of semiconductor devices with improved reliability.
Implementation Method 1
The wire stem is compression bonded to a substrate
Implementation Method 2
depositing an encapsulant over the substrate and wire studs
Data Source
AI summary
A semiconductor device has a substrate and semiconductor die disposed over a first surface of the substrate. A wire stud is attached to the first surface of the substrate. The wire stud includes a base portion and stem portion. A bonding pad is formed over a second surface of the substrate. An encapsulant is deposited over the substrate, semiconductor die, and wire stud. A portion of the encapsulant is removed by LDA to expose the wire stud. A portion of the encapsulant is removed by LDA to expose the substrate. An interconnect structure is formed over the encapsulant and electrically connected to the wire stud and semiconductor die. A bump is formed over the interconnect structure. A semiconductor package is disposed over the encapsulant and electrically connected to the substrate. A discrete semiconductor device is disposed over the encapsulant and electrically connected to the substrate.