Wireline Transceiver With Selectable Internal and External Clocks

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Solution Overview

Problem

High-speed wireline communication systems face challenges with external clock sources that are expensive and increase device size and power consumption, while onboard clock generation increases cost, size, and power consumption.

Innovation Solution

Integrated circuit devices with both internal and external clock signal generation capabilities, allowing users to select between external and onboard clock sources based on user input, using shared or separate input terminals, and calibrated onboard clock generation circuitry to generate accurate clock signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If external clock sources are used, then clock accuracy and stability are improved, but device cost, size, and power consumption increase

Engineering Contradiction:
Improveclock accuracyVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The integrated circuit device incorporates both external clock input capability and internal clock generation capability in a single device, allowing it to function in multiple modes depending on application requirements. The device can accept external clock signals when high accuracy is needed or generate clocks internally when cost and size are concerns, making the device universally applicable across different system requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The device includes intermediary circuitry that bridges external clock sources and internal clock generation, allowing seamless switching between the two modes. This intermediary mechanism enables the system to use external clocks when available for maximum accuracy while falling back to internal generation when external sources are unavailable or when cost/size constraints apply.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If external clock sources are used, then clock accuracy is improved, but power consumption increases

Engineering Contradiction:
Improveclock accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The device dynamically switches between external clock input mode and internal clock generation mode based on system conditions, availability of external sources, and power management requirements. This dynamic operation allows the system to consume power efficiently by using internal generation when external sources are not required, while maintaining the option to use external sources when maximum accuracy is needed and power is available.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The dual-mode clock system provides universal power management capability, allowing the device to adapt its power consumption profile to match system requirements. When external clocks are available, the device can operate in a lower-power internal generation mode; when external clocks are used, the system can leverage external power sources, providing flexibility in power management across different operating conditions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If onboard clock generation is added, then device versatility is improved, but device cost increases

Engineering Contradiction:
Improveclock source flexibilityVSAvoiddevice cost
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The integrated circuit is designed with universal clocking capability that accepts both external clock inputs and generates internal clocks, making the device adaptable to various application scenarios. This multi-functionality is achieved through integrating clock generation circuitry alongside the main functional circuits, allowing the same device to serve applications requiring external clocks, internal clocks, or both, thereby justifying the added cost through enhanced versatility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The clock generation functionality is merged with the main integrated circuit device rather than being a separate component. This consolidation combines the clock generation circuits with the functional circuits in a single integrated package, reducing overall system cost by eliminating the need for separate external clock components and simplifying the bill of materials while maintaining device versatility.

Inventive Principle:
Principle #5Merging (Combining)

4Adaptability or versatility

If both internal and external clock paths are provided, then clock source flexibility is improved, but device complexity increases

Engineering Contradiction:
Improveclock source selectionVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The clock system is segmented into distinct functional paths: an external clock input path and an internal clock generation path. Each path is independently designed and can be selectively activated. This segmentation allows the complex dual-mode functionality to be managed through modular design, where each segment handles a specific function and can be controlled independently, reducing the perceived complexity through clear functional separation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The device incorporates dynamic switching mechanisms that automatically or manually select between external and internal clock paths based on operational requirements. This dynamic control simplifies the user interface and system operation by abstracting away the underlying circuit complexity, allowing users to select clock sources through simple control signals while the complex switching and synchronization logic is handled automatically by the device.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250334997A1Wireline transceiver with internal and external clock generation
Publication Date: 2025.10.30 MARVELL ASIA PTE LTD
  • US20250334997A1 patent drawing
  • US20250334997A1 patent drawing
  • US20250334997A1 patent drawing

AI summary

An integrated circuit device having functional circuitry driven by a clock signal includes onboard clock generation circuitry. The clock generation circuitry includes an input configured to accept a frequency reference signal, at least one variable loading capacitor coupled to the input for converting the crystal resonator signal into a calibrated clock signal, and calibration circuitry configured to calibrate the at least one variable loading capacitor based on a reference voltage. The input configured to accept a frequency reference signal may be configured to accept a crystal resonator signal.