Wiring Board Insulation Layer with Varying Roughness Regions

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Solution Overview

Problem

Conventional wiring boards with roughened insulation layers to improve adhesion of fine wiring patterns suffer from deteriorated electrical characteristics, leading to poor reliability and peeling issues.

Innovation Solution

A wiring board configuration featuring an insulation layer with alternating regions of different arithmetic mean roughness, where the first wiring conductor is located from a region with a small roughness to a region with a larger roughness, enhancing adhesion and reducing electrical characteristic deterioration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the surface of the insulation layer is roughened to improve adhesion of fine wiring patterns, then adhesion between wiring pattern and insulation layer is improved, but electrical characteristics deteriorate

Engineering Contradiction:
Improveadhesion between wiring pattern and insulation layerVSAvoidelectrical characteristics
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The insulation layer is divided into multiple regions with different arithmetic mean roughness values. Regions with higher roughness (e.g., 0.5-2.0 μm) are positioned where wiring patterns require strong adhesion, while regions with lower roughness (e.g., 0.1-0.5 μm) are positioned where electrical characteristics must be maintained. This spatial variation in surface quality allows simultaneous optimization of both adhesion and electrical performance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The insulation layer surface is segmented into distinct regions with different roughness characteristics. This segmentation enables different functional zones: high-roughness zones for enhanced wiring adhesion and low-roughness zones for preserved signal transmission. The segmented approach resolves the contradiction by assigning different surface qualities to different functional requirements within the same insulation layer.

Inventive Principle:
Principle #1Segmentation

2Volume of moving object

If fine wiring patterns are formed at high density for downsizing, then device size is reduced, but wiring patterns become easily peeled off

Engineering Contradiction:
Improvedevice sizeVSAvoidadhesion of wiring patterns
Core Design Contradiction:
Volume of moving objectVSStrength

Solution Approach 1:

High-roughness regions are strategically positioned in areas where fine wiring patterns are formed to provide enhanced adhesion. The localized increase in surface roughness creates mechanical interlocking and increased surface area for bonding, preventing peeling of densely packed fine wirings while allowing device downsizing to continue.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces the deterioration of electrical characteristics and improves the adhesion of the wiring conductor, making it less likely to peel off while maintaining excellent electrical performance.

Implementation Method 1

a first surface of the insulation layer includes a first region having a first arithmetic mean roughness and a second region having a second arithmetic mean roughness, the second arithmetic mean roughness being larger than the first arithmetic mean roughness

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS20250168970A1Wiring board
Publication Date: 2025.05.22 KYOCERA CORP
  • US20250168970A1 patent drawing
  • US20250168970A1 patent drawing
  • US20250168970A1 patent drawing

AI summary

A wiring board according to the present disclosure includes an insulation layer having a first surface and a second surface opposite to the first surface, and a first wiring conductor located on the first surface. The first surface of the insulation layer includes a first region having a first arithmetic mean roughness and a second region having a second arithmetic mean roughness. The second arithmetic mean roughness is larger than the first arithmetic mean roughness, and the first wiring conductor is located from the first region to the second region.