Wiring Board Seed Layer Roughness for Void-Free Copper Plating
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Solution Overview
Problem
The formation of minute voids in the copper plating layer near the interface with the seed layer can lead to insufficient adhesiveness between the copper plating layer and the seed layer, particularly as the width of the wiring decreases, affecting the characteristics of the wiring board.
Innovation Solution
A method for manufacturing a wiring board involving the formation of a resist layer on a seed layer with controlled surface roughness, followed by electrolytic plating, where the arithmetic mean roughness of the seed layer's surface is maintained between 0.05 μm and 0.30 μm to reduce the occurrence of minute voids, and the seed layer is provided using electroless plating or metal foil with controlled thickness and surface treatment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the copper plating layer is formed on the seed layer by electrolytic plating, then the wiring with minute width can be formed, but minute voids occur at the interface between the seed layer and copper plating layer, reducing adhesiveness
Solution Approach 1:
The invention changes the surface roughness parameter of the seed layer from a conventional smooth surface to a controlled rough surface with Ra of 0.03 μm or more. This parameter change increases the surface area and creates mechanical interlocking, thereby improving adhesiveness between the seed layer and copper plating layer while preventing void formation during electrolytic plating.
Solution Approach 2:
The invention performs preliminary surface treatment of the support body to create a rough surface before forming the seed layer. This preliminary action ensures that the seed layer inherits the rough surface characteristics, which subsequently improves the adhesiveness during the copper plating process and prevents void formation at the interface.
2Length of moving object
If the wiring width is reduced to achieve smaller electronic devices, then the miniaturization requirement is met, but the number of minute voids increases, further reducing adhesiveness
Solution Approach 1:
The invention maintains a constant surface roughness parameter (Ra ≥ 0.03 μm) of the seed layer regardless of the wiring width reduction. This ensures that even as wiring dimensions decrease for miniaturization, the adhesiveness is preserved through the rough surface structure that prevents void formation, allowing continued scaling to smaller dimensions.
3Ease of manufacture
If the seed layer surface is made smooth, then the plating process is easier, but minute voids form at the interface, reducing manufacturing quality
Solution Approach 1:
The invention optimizes the surface roughness parameter to Ra of 0.03 μm or more, which is sufficiently rough to prevent void formation and ensure good adhesiveness, yet controlled enough to maintain plating processability. This optimized parameter balances manufacturing ease with interface quality.
Solution Approach 2:
The invention performs preliminary surface roughening of the support body before seed layer formation, establishing the desired surface characteristics in advance. This preliminary action ensures that the subsequent plating process proceeds smoothly while producing high-quality interfaces free of voids.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively suppresses the occurrence of minute voids, enhancing the adhesiveness between the copper plating layer and the seed layer, thereby improving the reliability of the wiring board.
Implementation Method 1
providing the seed layer on the support body by electroless plating
Implementation Method 2
forming a copper plating layer on the seed layer by electrolytic plating
Data Source
AI summary
A method for manufacturing a wiring board, including: forming a resist layer on a seed layer comprising a metal provided on a support body; forming a pattern including an opening to which the seed layer is exposed in the resist layer by light exposure and development of the resist layer, and forming a copper plating layer on the seed layer exposed into the opening by electrolytic plating, in this order. The arithmetic mean roughness Ra of the surface of the seed layer on a side opposite to the support body is 0.05 μm or more and 0.30 μm or less.