Wiring Board Surface Roughness Control for Insulation Reliability
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Solution Overview
Problem
Existing wiring boards face challenges in forming conductive circuits with high integration and reliability, particularly in achieving precise control over surface roughness and catalyst distribution, which can lead to short circuits and reduced insulation reliability.
Innovation Solution
A wiring board with an insulation layer containing a resin and silica-type filler, featuring a roughened surface with specific roughness profiles and conductive layers formed using electroless and electrolytic plated films, where the surface between conductive portions is recessed and the catalyst amount is controlled, and laser irradiation is used to remove unnecessary electroless plated film, utilizing the silica filler as a stopper.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the surface of the insulation layer is roughened to improve adhesion of the conductive layer, then the adhesion strength is improved, but the risk of short circuits between adjacent conductive portions increases due to excessive roughness
Solution Approach 1:
The patent applies local quality by creating different roughness levels in different regions of the insulation layer surface. Specifically, the surface under conductive portions has higher roughness (first roughness) to enhance adhesion, while the surface between conductive portions has lower roughness (second roughness) to prevent short circuits. This spatial variation in surface properties resolves the contradiction between needing high adhesion and maintaining insulation reliability.
2Manufacturing precision
If the catalyst amount is increased to improve electroless plating uniformity, then the plating uniformity is improved, but the cost and environmental impact increase
Solution Approach 1:
The patent applies local quality by creating regions with different catalyst concentrations on the insulation layer surface. The surface under conductive portions has higher catalyst concentration to ensure uniform electroless plating, while the surface between conductive portions has lower or no catalyst to prevent unwanted plating and reduce overall catalyst consumption. This spatial variation in catalyst distribution resolves the contradiction between achieving plating uniformity and reducing catalyst quantity.
3Ease of manufacture
If the roughness between conductive portions is high to maintain consistent surface treatment, then the manufacturing process is simplified, but the side surfaces of conductive portions become rough and affect solderability
Solution Approach 1:
The patent applies local quality by differentiating surface roughness in different regions. The surface under conductive portions maintains higher roughness for good adhesion, while the side surfaces of conductive portions have controlled roughness to ensure smooth profiles that facilitate soldering. This regional differentiation allows the process to achieve both manufacturing simplicity and good solderability by treating different areas with appropriate roughness levels.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of the wiring board by reducing the risk of short circuits, improving insulation quality, and ensuring smooth side surfaces, while maintaining efficient manufacturing processes.
Implementation Method 1
a surface of an insulation layer is roughened and electroless plated film is formed on the roughened surface
Implementation Method 2
electrolytic plated film is formed on portions where the plating resist is not formed
Implementation Method 3
removing the electroless plated film except the portions of the electroless plated film having the electrolytic plated film formed thereon by laser irradiation
Data Source
AI summary
A wiring board includes an insulation layer containing a resin and a silica-type filler and having a roughened surface, and a conductive layer formed on the roughened surface of the insulation layer and having a first conductive portion and a second conductive portion positioned adjacent to the first conductive portion. The roughened surface of the insulation layer has a roughness under the first conductive portion, a roughness under the second conductive portion, and a roughness between the first conductive portion and the second conductive portion, and the roughness between the first conductive portion and the second conductive portion is set less than at least one of the roughness under the first conductive portion and the roughness under the second conductive portion.


