Wiring Board Via Placement for Adhesion and Flatness
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Solution Overview
Problem
The formation of through holes below a wiring layer in wiring boards compromises the flatness, making it difficult to accurately form fine wirings, while omitting these holes reduces adhesiveness and leads to peeling off of plane layers.
Innovation Solution
A wiring board configuration that includes a first insulating layer with a first through hole exposing a wiring layer, a via filling the hole, a plane layer connected to the via, a second through hole exposing the insulating layer, and a second insulating layer partially filling the second hole, with signal wirings positioned such that the first through hole overlaps them but the second does not, enhancing adhesiveness and preventing peeling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If through holes are formed just below a wiring layer, then adhesiveness between plane layer and insulating layer is improved, but flatness of plane layer is deteriorated
Solution Approach 1:
The patent applies local quality by forming through holes only in specific regions where they are needed for adhesiveness, while maintaining flatness in regions where fine wirings are formed. The through holes are selectively positioned to provide localized bonding reinforcement without compromising the overall flatness required for precision wiring formation.
Solution Approach 2:
The patent segments the plane layer into different functional regions: regions with through holes for enhanced adhesiveness and regions without through holes for maintaining flatness. This segmentation allows the plane layer to simultaneously fulfill multiple functions - providing both mechanical bonding strength and a flat surface for precision wiring formation.
2Strength
If through holes are formed just below a wiring layer, then adhesiveness between plane layer and insulating layer is improved, but accuracy of fine wiring formation is deteriorated
Solution Approach 1:
The patent implements local quality by creating through holes only in specific areas where adhesiveness is needed, while preserving the flat surface quality in areas where fine wirings are formed. This localized approach ensures that the through holes provide bonding reinforcement without interfering with the precision required for wiring formation.
Solution Approach 2:
The patent segments the substrate into functional zones: one zone with through holes for mechanical bonding and another zone without through holes for precision wiring formation. This spatial segmentation resolves the contradiction by allowing each zone to optimize for its specific function.
3Manufacturing precision
If through holes are omitted below a wiring layer, then flatness of plane layer is maintained, but adhesiveness between plane layer and insulating layer is reduced
Solution Approach 1:
The patent applies local quality by strategically positioning through holes only where they are needed for adhesiveness, rather than uniformly distributing them or omitting them entirely. This selective placement maintains flatness in critical areas while providing localized bonding reinforcement where required.
Solution Approach 2:
The patent segments the plane layer into regions with through holes for bonding and regions without through holes for flatness maintenance. This segmentation allows the structure to simultaneously achieve both adhesiveness and flatness by assigning different functional characteristics to different spatial zones.
Data Source
AI summary
A wiring board includes first and second insulating layers, first and second through holes, a via, a plane layer, and signal wirings. The first insulating layer covers a first wiring layer. The first through hole opens on a surface of the first insulating layer and exposes a surface of the first wiring layer. The via fills the first through hole. The plane layer is connected to the via and is stacked on the first insulating layer. The second through hole opens on a surface of the plane layer and exposes the surface of the first insulating layer. The second insulating layer at least partially fills the second through hole and covers the plane layer. The signal wirings are stacked on the second insulating layer. The first through hole overlaps the signal wirings in a plan view. The second through hole does not overlap the signal wirings in a plan view.