Wiring Board Via Hole Surface Roughness Control

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Solution Overview

Problem

The challenge is to achieve both roughening of the insulating layer for enhanced adhesion and formation of fine, narrow-pitch wiring layers on a wiring board without encountering short circuits due to residues during the etching process.

Innovation Solution

A wiring board design featuring a first insulating layer with a smooth outer surface and a second insulating layer with smaller via holes and vias, allowing for the formation of fine wiring layers with increased reliability and reduced risk of short circuits, while also dispersing thermal stress through shifted boundary arrangements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If the insulating layer is roughened to enhance adhesion, then adhesion between insulating layer and wiring layer is improved, but formation of fine wiring layers becomes difficult due to residues during etching

Engineering Contradiction:
ImproveadhesionVSAvoidwiring layer formation precision
Core Design Contradiction:
StrengthVSManufacturing precision

Solution Approach 1:

The patent applies different surface qualities to different regions: the inner surface of the via hole is roughened to enhance adhesion, while the outer surface of the insulating layer is kept smooth to enable precise formation of fine wiring layers. This local differentiation resolves the contradiction between adhesion requirements and wiring precision requirements.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If narrow-pitch wiring layers are formed on roughened surface, then wiring density is increased, but short circuit occurs easily due to residues during etching

Engineering Contradiction:
Improvewiring densityVSAvoidshort circuit resistance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent differentiates surface quality by region: the outer surface is maintained smooth to prevent residues during etching of narrow-pitch wiring layers, ensuring reliability, while the inner via hole surface is roughened for adhesion. This allows high wiring density without short circuits.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If via diameter is reduced for fine wiring, then wiring precision is improved, but adhesion becomes insufficient due to reduced contact area

Engineering Contradiction:
Improvevia hole precisionVSAvoidadhesion
Core Design Contradiction:
Manufacturing precisionVSStrength

Solution Approach 1:

The patent applies roughening treatment specifically to the inner surface of the via hole to compensate for reduced adhesion area in smaller vias, while maintaining smooth outer surfaces for precision. This allows small via diameters for fine wiring while ensuring sufficient adhesion through enhanced surface texture inside the via.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances adhesion between the insulating and wiring layers, supports high wiring density, and reduces the occurrence of cracks and residues, facilitating the creation of finer wiring layers with improved reliability and flexibility.

Implementation Method 1

a via hole is formed with a laser in an insulating layer on a wiring layer

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Implementation Method 2

a desmearing process is performed to remove resin smears in the via hole. This desmearing process etches the insulating layer

Methodology Applied
Scientific EffectEtching:

Implementation Method 3

The roughened surface of the insulating layer has anchor effect and this anchor effect enhances adhesion between the insulating layer and a wiring layer on the insulating layer

Methodology Applied
Scientific EffectAdhesion: Adhesive

Data Source

PatentUS9167692B2Wiring board, semiconductor device, and method of manufacturing wiring board
Publication Date: 2015.10.20 SHINKO ELECTRIC IND CO LTD
  • US9167692B2 patent drawing
  • US9167692B2 patent drawing
  • US9167692B2 patent drawing

AI summary

A wiring board includes a first via hole in a first insulating layer to expose a first wiring layer. A first via in the first via hole includes an end surface. A second wiring layer is arranged on the first insulating layer and the end surface of the first via. A second insulating layer covers the second wiring layer. A second via hole in the second insulating layer exposes the second wiring layer. A second via in the second via hole is arranged above the first via through the second wiring layer. The outer surface of the first insulating layer is lower in surface roughness than an inner surface of the first via hole.