Wiring Substrate Adhesion via Coating Film and Via Conductor
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Solution Overview
Problem
Existing wiring substrates face challenges in achieving high adhesion strength between conductive layers and insulating layers, particularly due to the formation of peeling parts that extend beyond the via hole, leading to reduced connectivity and increased impedance.
Innovation Solution
A wiring substrate design featuring a coating film on the conductive layers to enhance adhesion, with a via conductor formed through a through hole in the insulating layer and coating film, and a peeling part strategically positioned within 15 μm of the via hole's outer edge on the pad surface, ensuring improved connectivity and reduced impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a coating film is formed on the conductive layer to improve adhesion, then adhesion strength between conductive layer and insulating layer is improved, but the complexity of the manufacturing process increases
Solution Approach 1:
A coating film is formed on the conductive layer in advance before the insulating layer is applied. This preliminary coating action ensures that when the insulating layer is later formed, the adhesion between the conductive layer and insulating layer is already optimized, eliminating the need for additional adhesion-enhancing steps later in the process.
2Reliability
If the peeling part is formed within 15 μm around the via hole to improve connectivity, then impedance increase is suppressed, but the manufacturing precision requirements increase
Solution Approach 1:
The invention specifies a precise parameter range for the peeling part position (within 15 μm around the via hole outer edge) and pad surface roughness (Rq: 0.10 μm to 0.23 μm). By controlling these parameters within defined ranges, the invention achieves optimal connectivity and suppresses impedance increase while providing clear manufacturing targets for quality control.
3Reliability
If the pad surface roughness is controlled within 0.10 μm to 0.23 μm to stabilize conductivity, then impedance increase is suppressed, but the manufacturing precision requirements increase
Solution Approach 1:
The invention defines a specific range for pad surface roughness (Rq: 0.10 μm to 0.23 μm) that optimizes conductivity stability. This parameter control ensures that the pad surface has appropriate characteristics for electrical connection while providing a measurable target for manufacturing processes.
Solution Approach 2:
Instead of relying on purely mechanical or geometric features to ensure conductivity, the invention uses surface roughness as a controllable parameter. This substitution allows for more precise control of electrical properties through surface characteristics rather than through dimensional tolerances alone.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances adhesion strength between the conductive and insulating layers, stabilizes conductivity, and suppresses impedance increases by containing the peeling part within specific dimensions, thereby improving the overall performance of the wiring substrate.
Implementation Method 1
a coating film formed on the first conductive layer such that the coating film is covering the first conductive layer including the pad and improving adhesion between the first conductive layer and the second insulating layer
Data Source
AI summary
A wiring substrate includes insulating layers including a first insulating layer and a second insulating layer, conductive layers including a first conductive layer including a pad and a second conductive layer, a coating film covering the first conductive layer including the pad and improving adhesion between the first conductive layer and the second insulating layer, and a via conductor formed in a through hole penetrating through the second insulating layer and the coating film on the pad and connecting the pad and the second conductive layer. The pad has a surface formed such that a root mean square roughness of the surface is in a range of 0.10 μm to 0.23 μm, and a peeling part is formed between the pad and the second insulating layer such that the peeling part is formed within 15 μm around an outer edge of the through hole on the surface of the pad.