Wiring Substrate Asymmetric Via and Conductor Design
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Solution Overview
Problem
Multilayer printed wiring boards face warpage issues due to differences in conductor material content across via holes, which can lead to substrate curvature and quality defects.
Innovation Solution
A wiring substrate design featuring a core layer with multiple conductor layers and interlayer insulating layers, where via conductors are tapered in diameter and the second inner conductor layer is thicker than the first, balancing conductor volume and reducing thermal expansion differences, and conductor layers have laminated structures with metal foil and plating film layers for improved adhesion and patterning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via holes are formed by electrolytic copper plating to connect surface-layer conductor circuits, then electrical connection between layers is achieved, but warpage and substrate curvature occur due to differences in conductor material content
Solution Approach 1:
The patent applies local quality by creating asymmetric conductor layer structures at specific locations. The second inner conductor layer is formed with greater thickness than the first inner conductor layer, and the via conductors are positioned asymmetrically within the core layer. This local variation in conductor distribution balances the thermal expansion characteristics in different regions, preventing warpage while maintaining electrical connectivity.
Solution Approach 2:
The patent changes physical parameters of the conductor layers, specifically varying the thickness of inner conductor layers and the diameter of via conductors at different positions. By adjusting these parameters asymmetrically, the patent optimizes thermal expansion balance and prevents substrate curvature, resolving the contradiction between electrical connection reliability and substrate stability.
2Productivity
If conductor layers are formed with uniform thickness to simplify manufacturing, then production efficiency increases, but thermal expansion differences cause warpage
Solution Approach 1:
Instead of uniform conductor layers, the patent implements local quality variations where the second inner conductor layer has greater thickness than the first. This localized thickness variation compensates for thermal expansion differences, preventing warpage while maintaining manufacturing feasibility through controlled deposition processes.
Solution Approach 2:
The patent introduces asymmetric conductor layer structures where corresponding layers on opposite sides of the core layer have different thicknesses. This asymmetry is deliberately designed to balance thermal expansion forces, resolving the warpage issue that would otherwise result from symmetric uniform-thickness designs.
3Device complexity
If via conductors are formed with constant diameter to simplify processing, then manufacturing complexity decreases, but conductor volume imbalance causes warpage
Solution Approach 1:
The patent changes the geometric parameter of via conductors by forming them with varying diameters rather than constant diameter. The via conductors are positioned asymmetrically with different sizes to balance the total conductor volume on both sides of the core layer, preventing warpage while maintaining relatively simple cylindrical structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses warpage and enhances the quality of the wiring substrate by balancing conductor content and thermal expansion, ensuring a stable substrate structure.
Implementation Method 1
balancing conductor volume and reducing thermal expansion differences
Implementation Method 2
conductor layers have laminated structures with metal foil and plating film layers for improved adhesion
Data Source
AI summary
A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the core layer such that each via conductor decreases in diameter from one of the inner conductor layers toward the other one of the inner conductor layers and that the other one of the inner conductor layers has thickness greater than thickness of the one of the inner conductor layers. The first and/or second inner conductor layers includes a first laminated structure including metal foil and plating film layers, the first and/or second outer conductor layers includes the first laminated structure, and the first and/or second intermediate conductor layers includes a second laminated structure including metal foil and plating film layers.