Wiring Substrate Build-Up Layer Precision
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Solution Overview
Problem
The existing methods for manufacturing wiring substrates, such as BBUL, face challenges in achieving high density and reduced size due to issues like positional shift of semiconductor chips during resin formation, leading to connecting failures and poor precision in forming fine wirings due to the roughness of the mold resin surface.
Innovation Solution
A method involving a reinforcing substrate with a coefficient of thermal expansion matching that of the chip component, using a resin with a specific elasticity range, and a transfer molding process to form a build-up layer on a smooth surface, ensuring precise wiring formation and reliable electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor chip is embedded in the mold resin to form the build-up layer, then the chip can be sealed and protected, but the thermal contraction during resin formation causes positional shift of the chip, leading to connecting failures
Solution Approach 1:
The build-up layer is divided into two parts: a mold resin layer for sealing and protection, and a separate smooth surface layer (formed by releasing the tape base material) for precise wiring formation. This segmentation allows each layer to fulfill its specific function without interfering with the other's performance.
Solution Approach 2:
The tape base material acts as an intermediary carrier that holds the semiconductor chip in a fixed position during the resin formation process. By releasing the tape base material after molding, a smooth surface is created that eliminates positional shift issues while maintaining the sealing function of the mold resin.
2Ease of manufacture
If the build-up wiring layer is formed on the mold resin surface, then the wiring can be connected to the chip pad, but the roughness of the mold resin surface reduces the precision of wiring formation
Solution Approach 1:
The build-up layer is segmented into a mold resin layer (for sealing) and a smooth surface layer (for precise wiring). The smooth surface is created by releasing the tape base material, providing a separate functional area for high-precision wiring formation.
Solution Approach 2:
The smooth surface is created as a copy or replica of the original tape base material surface. This smooth copy provides the necessary surface quality for precise wiring formation while the mold resin layer maintains the sealing function.
3Reliability
If a bump is used to connect the chip pad to the build-up wiring layer, then electrical connection can be achieved, but the substrate thickness increases and inductance is raised, causing unstable high-frequency operation
Solution Approach 1:
The bump structure is completely removed from the connection method. Instead of using a raised bump element, the patent achieves direct electrical connection between the chip pad and build-up wiring layer through a planar, bump-free interface, eliminating the associated thickness and inductance problems.
Solution Approach 2:
Instead of connecting the chip to the wiring layer through a protruding bump (vertical connection), the patent inverts the approach by creating a direct planar contact interface where the wiring layer contacts the chip pad surface directly (horizontal connection), thereby eliminating the bump structure entirely.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the reliable electrical connection of chip components to the build-up layer, enhances the precision of wiring formation, and reduces the occurrence of connecting failures, enabling the creation of high-density wiring substrates with improved reliability and reduced size.
Implementation Method 1
there is a possibility that a position in which the semiconductor chip 1 is disposed might be shifted due to a thermal contraction in the formation of the mold resin 5
Implementation Method 2
a tape base material 3 having an adhesive 4 provided on a surface is prepared
Data Source
AI summary
A method includes the steps of providing a first tape base material on a single side of a stiffener substrate, forming, on the stiffener substrate, a cavity for accommodating a semiconductor chip therein, inserting the stiffener substrate in the cavity and providing the stiffener substrate on the first tape base material, sealing the semiconductor chip and the stiffener substrate with a sealing resin, and removing the first tape base material and forming a build-up layer on a tape removing surface.


