Wiring Substrate Coplanar Terminals for Semiconductor Interconnects
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Solution Overview
Problem
Existing wiring substrates face challenges in ensuring reliable electrical connections between semiconductor elements, particularly when multiple components are mounted, due to variations in electrode terminal lengths and manufacturing complexity.
Innovation Solution
A wiring substrate design featuring a wiring component with exposed connection terminals on the upper surface and internal connection terminals on the lower surface, embedded within an insulation layer, which connects semiconductor elements and reduces manufacturing steps by forming wiring layers on a support substrate before mounting, ensuring coplanar terminal surfaces for enhanced reliability and cost-effectiveness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional wiring substrates are used to connect multiple semiconductor elements, then electrical connections can be established, but manufacturing complexity increases and connection reliability decreases due to variations in electrode terminal lengths
Solution Approach 1:
The patent applies preliminary action by forming wiring layers on the support substrate before mounting the semiconductor element. The wiring layers are prepared in advance with connection terminals that will later connect to the semiconductor element's electrode terminals. This preliminary preparation ensures that the wiring substrate is ready to accommodate semiconductor elements with varying terminal lengths, as the wiring layers are already positioned and configured to establish reliable electrical connections regardless of the specific terminal length variations.
2Adaptability or versatility
If multiple semiconductor elements are mounted on the wiring substrate, then functional connectivity is achieved, but the number of manufacturing steps increases
Solution Approach 1:
The patent merges multiple manufacturing operations into a unified process. The support substrate serves dual purposes: it acts as both the mounting platform for the semiconductor element and as the base for forming the wiring layers. By integrating the substrate preparation and wiring formation into a single coordinated process, the patent reduces the total number of manufacturing steps while maintaining the ability to achieve functional connectivity between multiple semiconductor elements.
3Reliability
If conventional connection methods are used, then electrical connections are established, but manufacturing cost increases due to additional manufacturing steps
Solution Approach 1:
The patent applies universality by designing the wiring layers to serve multiple functions simultaneously. The wiring layers on the support substrate not only provide electrical connections but also serve as the mounting structure for the semiconductor element. The connection terminals of the wiring layers are designed to universally connect to electrode terminals of semiconductor elements with varying lengths, eliminating the need for separate mounting and wiring processes, thereby reducing manufacturing cost while maintaining connection reliability.
Data Source
AI summary
A wiring component electrically connects a first semiconductor element, including first and second electrode terminals, and a second semiconductor element, including third and fourth electrode terminals. The wiring component includes first and second connection terminals respectively connected to the first and third electrode terminals. A third connection terminal is connected to the second electrode terminal, and a fourth connection terminal is connected to the fourth electrode terminal. An insulation layer embeds the wiring component and the third and fourth connection terminals. A wiring layer is formed on a lower surface of the insulation layer and connected to an internal connection terminal and the third and fourth external terminals. Upper surfaces of the first to fourth external terminals are located coplanar with one another.