Wiring Substrate Filled Vias Thermal Stress Dispersion
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Solution Overview
Problem
The coefficient of linear expansion difference between metal-filled vias and insulating layers in wiring substrates leads to thermal stress, potentially causing cracks or disconnection, thereby reducing the reliability of electrical connections.
Innovation Solution
A wiring substrate design with filled vias connected to a pad, dispersing thermal stress through the pad, and featuring a second insulating layer with a plated layer for electrical connection, which helps maintain reliability even with large thermal expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the thickness of the first insulating layer is increased, then the wiring substrate can accommodate more layers and components, but thermal stress increases causing cracks or disconnection
Solution Approach 1:
The patent changes the material parameter of the first insulating layer by selecting a material with a coefficient of linear expansion that is 0.5 to 2.0 times that of the metal in the filled via. This parameter adjustment allows the insulating layer to expand more with temperature changes, reducing thermal stress and preventing cracks or disconnection while maintaining the ability to accommodate multiple layers and components.
Solution Approach 2:
The patent employs composite material construction by combining the first insulating layer with specific metal-filled vias and conductor layers. The composite structure includes the insulating layer material (with higher thermal expansion coefficient) and the metal-filled vias (with lower thermal expansion coefficient), creating a balanced thermal expansion system that reduces stress concentration and improves reliability.
2Stability of the object's composition
If a metal with low coefficient of linear expansion is used for filled via, then dimensional stability is improved, but thermal stress causes cracks or disconnection
Solution Approach 1:
The patent changes the material selection parameter by specifying that the first insulating layer should have a coefficient of linear expansion that is 0.5 to 2.0 times that of the metal in the filled via. This parameter relationship allows the insulating layer to compensate for the low thermal expansion coefficient of the metal, reducing thermal stress while maintaining dimensional stability.
Solution Approach 2:
The patent applies local quality by differentiating the thermal expansion characteristics of different components: the first insulating layer has a higher coefficient of linear expansion than the metal-filled vias. This local differentiation creates a stress-balanced structure where the insulating layer's greater expansion compensates for the metal's resistance to thermal stress, improving overall reliability.
3Reliability
If multiple filled vias are connected to the pad, then thermal stress is dispersed, but manufacturing complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the electrical connection into multiple filled vias that are connected to the pad. Instead of using a single via, multiple vias are distributed and connected to the pad, which disperses thermal stress across multiple connection points. This segmented approach improves reliability while the vias can be formed using standard manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability of electrical connections by suppressing disconnection and maintaining connectivity under thermal stress, ensuring stable high-frequency characteristics and reduced transmission loss.
Implementation Method 1
a coefficient of linear expansion differs between a metal forming the filled via and the pad and an insulator forming the insulating layer. Therefore, when a change in temperature occurs in the wiring substrate, the filled via or the like may be cracked due to a thermal stress
Implementation Method 2
a plated layer for electrically connecting the second conductor layer and the plurality of filled vias may be formed on an inner surface of the through hole
Data Source
AI summary
A wiring substrate includes a first insulating layer, a first conductor layer, and a plurality of filled vias. The first insulating layer has a first surface and a second surface positioned on a side opposite to the first surface. The first conductor layer is formed on the first surface of the first insulating layer. The plurality of filled vias are formed inside the first insulating layer. The plurality of filled vias each have a structure in which a via hole penetrating the first insulating layer is filled with a metal. The first conductor layer includes a pad. The pad overlaps the plurality of filled vias in a plan view from a thickness direction of the first insulating layer and is connected to the plurality of filled vias.