Wiring Substrate Identification Mark Visibility via Nested Via Holes
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Solution Overview
Problem
The visibility of identification marks formed by through holes on wiring substrates is insufficient, making it difficult to identify defects or manufacturing information on unit wiring substrates.
Innovation Solution
The solution involves forming via holes and through holes in insulation layers, with via wirings extending through the insulation layers to create identifiable shapes, such as characters or symbols, that are flush with the wiring layers, enhancing visibility and allowing for easier identification of defects or manufacturing information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If identification marks are formed by through holes in the insulation layer, then the manufacturing process is simple, but the visibility of the identification marks is insufficient
Solution Approach 1:
The identification mark is formed not only by through holes but also by adding via holes that extend to the lowermost wiring layer, creating a multi-dimensional structure. The combination of through holes and via holes forms a composite identification mark that is visible from both the upper surface and lower surface, resolving the visibility issue while maintaining manufacturing simplicity
Solution Approach 2:
The via holes are nested within or adjacent to the through holes to create a layered identification mark structure. The via holes extend from the lower surface to expose the lowermost wiring layer, while the through holes extend through the entire insulation layer, creating a nested configuration that enhances visibility without adding complex manufacturing steps
2Reliability
If the lowermost insulation layer covers the lowermost wiring layer completely, then the insulation performance is improved, but the visibility of the identification mark is reduced
Solution Approach 1:
The lowermost insulation layer maintains complete coverage for insulation performance, but via holes are formed to locally expose the lowermost wiring layer at specific positions. This creates local quality variations where the insulation layer is both complete (for reliability) and has controlled openings (for visibility), resolving the contradiction between insulation performance and identification mark visibility
Data Source
AI summary
A wiring substrate includes wiring layers and insulation layers alternately stacked. Via holes are formed in the insulation layers. First via wirings are formed in the via holes to electrically connect the wiring layers to one another. Through holes extend through a lowermost one of the insulation layers in a thickness direction. The lowermost insulation layer covers a lowermost one of the wiring layers. Second via wirings are formed in the through holes to define an identification mark that is identifiable as a specific shape including a character, a symbol, or a combination thereof. A lower surface of each of the second via wirings is exposed from a lower surface of the lowermost insulation layer and is flush with a lower surface of the lowermost wiring layer.