Wiring Substrate With Segmented Conductive Planes for Noise Resistance
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Solution Overview
Problem
Semiconductor devices face challenges in improving noise resistance due to the design of wiring layers in semiconductor chips mounted on substrates, where conductive planes are not effectively formed to mitigate noise interference.
Innovation Solution
The semiconductor device incorporates conductive planes at each wiring layer with through hole lands, where the opening area is larger than the plane area of the through hole land, providing improved noise resistance by reducing electromagnetic interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conductive planes are formed at each wiring layer, then noise resistance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies local quality by forming openings only in specific wiring layers (first and third layers) rather than all layers, and positioning these openings specifically over through-hole lands. This localized approach provides noise shielding where most needed while avoiding the manufacturing complexity of modifying every wiring layer uniformly.
Solution Approach 2:
The conductive planes are segmented into discrete regions by forming openings at specific locations (over through-hole lands) rather than creating continuous planes across entire wiring layers. This segmentation reduces manufacturing complexity while maintaining noise resistance at critical interference points.
2Object-affected harmful factors
If opening area is made larger than through hole land area, then electromagnetic interference is reduced, but wiring space is reduced
Solution Approach 1:
The openings are localized specifically over through-hole lands where electromagnetic interference from solder balls occurs, rather than creating large openings across the entire wiring layer. This targeted approach reduces EMI at critical points while preserving wiring space in other regions.
Solution Approach 2:
The opening area is made larger than the through-hole land area to provide sufficient noise shielding, applying partial excessive action. The opening extends beyond the minimum required area to ensure adequate electromagnetic interference reduction, while still being limited to specific locations rather than the entire substrate.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the semiconductor device's noise resistance, ensuring reliable signal transmission and improved performance by minimizing the impact of electromagnetic noise on high-speed transmission paths.
Implementation Method 1
a conductive plane 2PL1 formed at each of the wiring layers 2W1 to 2W6... an opening 2K1 formed in the conductive plane 2PL1... Area of the opening is larger than a plane area of the through hole land... improved resistance to noise
Data Source
AI summary
A semiconductor device is provided with improved resistance to noise. Conductive planes are respectively formed over wiring layers. One wiring layer is provided with a through hole land integrally formed with a through hole wiring. In other wiring layers located over the wiring layer with the through hole land, openings are respectively formed in the conductive planes. The area of each of the openings is larger than the plane area of the through hole land.