Wiring Substrate Resin Sealing for Waste-Free Chip Stacking
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Solution Overview
Problem
Existing semiconductor devices with stacked semiconductor chips on a wiring substrate face inefficiencies in manufacturing, leading to wasted material and increased costs due to unused peripheral edge portions, and lack effective protection of side surfaces.
Innovation Solution
A method involving cutting and dicing wiring substrates into individual units before stacking semiconductor elements and sealing with a resin layer that covers side surfaces, eliminating peripheral edge waste and enhancing durability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of substance
If semiconductor chips are stacked on a wiring substrate and sealed with resin, then the device achieves functional integration and protection, but peripheral edge portions of the wiring substrate remain unused and cause material waste
Solution Approach 1:
The wiring substrate is divided into multiple individual units through cutting and dicing operations. Each substrate unit becomes an independent carrier for semiconductor chips, allowing full utilization of the substrate area and eliminating peripheral waste. The segmentation enables precise placement of chips on each substrate unit without unused edge portions.
Solution Approach 2:
The wiring substrates are cut and diced into individual units before the semiconductor chips are mounted and sealed. This preliminary processing step allows for optimized substrate utilization and eliminates material waste before the assembly process begins, improving overall manufacturing efficiency.
2Reliability
If conventional sealing methods are used, then the top surface is protected, but the side surfaces of the wiring substrate lack effective protection
Solution Approach 1:
The sealing approach transitions from two-dimensional top-surface sealing to three-dimensional sealing that encompasses the side surfaces of the wiring substrate. The resin sealant is applied to cover the peripheral edges and side surfaces, providing comprehensive protection in multiple dimensions and enhancing device reliability.
Solution Approach 2:
The sealing structure uses a composite approach combining the wiring substrate material with a resin sealant material. The resin layer is applied over the peripheral edges and side surfaces, creating a composite protective structure that leverages the complementary properties of both materials for enhanced durability and protection.
Data Source
AI summary
According to one embodiment, a semiconductor device includes a wiring substrate having a first surface, a second surface opposite to the first surface, and a side surface connecting the first surface and the second surface. A first electrode is on the first surface. A semiconductor element is on the wiring substrate and electrically connected to the first electrode. A resin layer covers the semiconductor element and the first surface from a first direction orthogonal to the first surface. A portion of the resin layer contacts the side surface of the wiring substrate from a second direction parallel to the first surface. The resin layer has an outside side surface that is substantially parallel to the first direction.