Coreless Wiring Substrate with Symmetrical Silicon Interposer
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Solution Overview
Problem
Wiring substrates without a core substrate, or 'coreless substrates,' are prone to warpage due to their low rigidity, especially when semiconductor elements are mounted and subjected to heat during reflow soldering processes, and they struggle with finer wiring fabrication due to the limitations of organic resin materials.
Innovation Solution
A wiring substrate structure with a silicon interposer buried in an outermost insulating layer at the first surface side and a sheet-shaped member with high elastic modulus and low coefficient of thermal expansion buried in the outermost insulating layer at the second surface side, positioned symmetrically to each other, to enhance rigidity and reduce warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If a coreless substrate structure is used to achieve thinner wiring substrate, then substrate thickness is reduced, but substrate rigidity deteriorates and warpage is likely to occur
Solution Approach 1:
The patent employs a composite structure combining organic resin layers with a silicon interposer and sheet-shaped reinforcing members. The silicon interposer provides high rigidity and dimensional stability, while the organic resin layers provide electrical insulation and wiring functionality. This composite approach allows the substrate to be thin yet maintain sufficient rigidity to prevent warpage during semiconductor element mounting and reflow soldering processes.
2Ease of manufacture
If organic resin is used as base material for wiring substrate, then ease of manufacture is improved, but manufacturing precision deteriorates due to inability to achieve flat surface for finer wiring
Solution Approach 1:
The patent introduces a silicon interposer as an intermediary layer between the organic resin substrate and the semiconductor element. The silicon interposer provides a flat, highly precise surface that enables fine wiring fabrication, while the organic resin substrate maintains ease of manufacture for the overall substrate structure. The interposer acts as a mediator that transfers the precision requirement from the wiring layer to a material (silicon) that can provide it.
3Reliability
If semiconductor element is mounted on wiring substrate through reflow soldering, then electrical connection is achieved, but warpage is likely to occur due to heat application and material property differences
Solution Approach 1:
The patent strategically places sheet-shaped reinforcing members at specific positions within the substrate structure, particularly near the semiconductor element mounting area. These reinforcing members have high elastic modulus and are positioned to counteract the thermal expansion stresses and mechanical deformations that occur during reflow soldering. The parameters of the substrate structure (reinforcing member location, thickness, and material properties) are optimized to maintain shape stability while allowing reliable electrical connection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces warpage and allows for finer wiring fabrication, improving the rigidity and thermal expansion matching of the substrate, enabling more reliable semiconductor device assembly and operation.
Implementation Method 1
the elastic modulus and coefficient of thermal expansion (CTE) as a whole of the wiring substrate having an organic resin as its base material, are far different from the elastic modulus and CTE of a semiconductor element (whose base material is silicon) mounted thereon
Implementation Method 2
a sheet-shaped member buried in an outermost one of the insulating layers located at the second surface side... to enhance rigidity and reduce warpage
Data Source
AI summary
A wiring substrate includes a structure in which a plurality of wiring layers are stacked through insulating layers intervening therebetween, and which has a first surface side and a second surface side, the first surface side where a semiconductor element is to be mounted, the second surface side being located at an opposite side to the first surface side, an interposer buried in an outermost one of the insulating layers located at the first surface side, and electrically connected to the semiconductor element to be mounted, and a sheet-shaped member buried in an outermost one of the insulating layers located at the second surface side, wherein, the interposer and the sheet-shaped member are disposed at symmetrical positions symmetrical each other.