Wiring Substrate With Intermediate Stress Buffer Layer

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Solution Overview

Problem

Conventional wiring substrates face challenges in maintaining connection reliability due to thermal expansion rate mismatches between semiconductor chips and mounting substrates, and in forming narrow pitch external connection terminals effectively.

Innovation Solution

A wiring substrate structure comprising an inorganic substrate bonded to an organic substrate via a stress buffer layer with a thermal expansion coefficient intermediate to both, along with penetration wiring for electrical connection, which reduces stress and enhances reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a wiring substrate uses a single substrate material (either inorganic or organic), then the manufacturing process is simple, but the connection reliability deteriorates due to thermal expansion rate mismatch between the substrate and semiconductor chip

Engineering Contradiction:

Improveconnection reliabilityVSAvoidsubstrate structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The substrate is divided into two distinct parts: an inorganic substrate portion and an organic substrate portion. Each portion is made of materials with different thermal expansion characteristics, allowing the wiring substrate to match thermal expansion rates with semiconductor chips while maintaining manageable manufacturing complexity through modular construction

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The wiring substrate employs a composite structure combining inorganic and organic materials in a single substrate. This composite approach enables the substrate to exhibit thermal expansion properties that match semiconductor chips, improving connection reliability while the integrated design keeps the overall structure manageable

Inventive Principle:

Principle #40Composite materials

2Manufacturing precision

If the wiring substrate uses an inorganic substrate with high thermal expansion mismatch, then the thermal expansion stress increases, but the manufacturing precision for narrow pitch terminals is improved

Engineering Contradiction:

Improveterminal pitch precisionVSAvoidthermal expansion stress

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The thermal expansion coefficient parameter of the substrate is optimized by combining inorganic and organic materials. This parameter change reduces thermal expansion stress to acceptable levels while the inorganic portion maintains the manufacturing precision needed for narrow pitch terminals

Inventive Principle:

Principle #35Parameter changes

3Object-affected harmful factors

If a stress buffer layer with intermediate thermal expansion coefficient is introduced between inorganic and organic substrates, then the thermal expansion stress is reduced, but the device structure becomes more complex

Engineering Contradiction:

Improvethermal expansion stressVSAvoidlayer structure complexity

Core Design Contradiction:

Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

A stress buffer layer with intermediate thermal expansion coefficient is introduced between the inorganic and organic substrate portions. This intermediary layer acts as a transition zone that gradually accommodates the thermal expansion difference, reducing stress while the integrated bonding approach keeps the overall structure manageable

Inventive Principle:

Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively mitigates thermal expansion-related stress and improves connection reliability between the inorganic and organic substrates, enabling direct semiconductor chip mounting and simplifying manufacturing processes while allowing for ultra-fine features and narrow-pitched terminals.

Implementation Method 1

A thermal expansion coefficient of the stress buffer layer is greater than a thermal expansion coefficient of the inorganic substrate and less than a thermal expansion coefficient of the organic substrate

Methodology Applied

Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS8766101B2Wiring substrate, method for manufacturing wiring substrate, and semiconductor package including wiring substrate

Publication Date: 2014.07.01 SHINKO ELECTRIC IND CO LTD

AI summary

A wiring substrate includes an inorganic substrate including a substrate body formed of an inorganic material, a wiring pattern formed on the substrate body, and an external connection terminal being electrically connected to the wiring pattern, an organic substrate that is formed below the inorganic substrate, the organic substrate including an insulating layer and a wiring layer formed on the insulating layer, and a bonding layer interposed between the inorganic substrate and the organic substrate, the bonding layer including a stress buffer layer and a penetration wiring that penetrates the stress buffer layer. A thermal expansion coefficient of the stress buffer layer is greater than a thermal expansion coefficient of the inorganic substrate and less than a thermal expansion coefficient of the organic substrate. The wiring pattern and the wiring layer are electrically connected by way of the penetration wiring.