Wiring Substrate Tapered Through-Wiring Flatness
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional wiring substrates face limitations in increasing surface flatness and reducing via diameter through laser processing, making it difficult to achieve high densification of wiring layers for semiconductor packages.
Innovation Solution
A wiring substrate design featuring a core layer with layered insulating and wiring structures, including through-wirings with tapered shapes and polished surfaces to enhance flatness and allow for higher wiring density, and the use of photosensitive and non-photosensitive insulating resins to balance thickness and prevent warping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If laser processing is used to reduce via diameter and increase surface flatness, then wiring density can be improved, but there are limits to further reduction and flatness improvement
Solution Approach 1:
The insulating layer surface is polished before forming the via wiring to create a flat base surface. This preliminary flatening action enables subsequent high-precision laser processing and fine wiring formation, resolving the contradiction by preparing the surface in advance rather than relying solely on laser processing for flatness.
Solution Approach 2:
The patent replaces reliance on laser processing alone with a combination of mechanical polishing and laser processing. The mechanical polishing step substitutes for the need to achieve all flatness requirements through laser processing, enabling further precision improvement without the diminishing returns encountered with laser-only approaches.
2Productivity
If wiring layers are made finer and more dense, then high densification is achieved, but surface irregularities can cause wiring layer collapse
Solution Approach 1:
The insulating layer surface is polished in advance to create a flat surface before forming dense wiring layers. This preliminary flatening prevents surface irregularities that would otherwise cause wiring layer collapse, enabling high densification while maintaining reliability.
Solution Approach 2:
The patent applies different surface treatments to different regions: the insulating layer surface is polished to high flatness in areas where fine wiring will be formed, while other areas may have different surface characteristics. This localized quality improvement ensures wiring layer stability where needed without compromising overall manufacturing.
3Productivity
If via diameter is reduced for higher density, then wiring layer densification improves, but manufacturing precision limits are reached
Solution Approach 1:
The insulating layer is polished before via formation to create a flat reference surface. This preliminary action enables more precise via positioning and formation at smaller diameters, pushing beyond the conventional limits of laser processing alone and achieving higher wiring layer densification.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design achieves improved flatness and higher wiring density, enabling the formation of fine wiring patterns and preventing warping, thus addressing the challenges of size reduction and high densification in semiconductor packages.
Implementation Method 1
via wirings having different thermal expansion coefficients to manage thermal stress and prevent projection issues
Data Source
AI summary
A wiring substrate includes a core layer, a first wiring layer, a first insulating layer, a first via wiring, a second wiring layer, a second insulating layer, a second via wiring, a third wiring layer, a third insulating layer, a third via wiring, and a through-wiring. The through-wiring includes upper and lower end surfaces. The upper end surface has an area that is smaller than an area of the lower end surface. The upper surface of the first insulating layer is more flat than the lower surface of the third insulating layer. The second wiring layer has a wiring density that is higher than a wiring density of the first wiring layer.