Wiring Substrate Via Structure to Prevent ENIG Over-Etching

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Solution Overview

Problem

The existing wiring substrates for liquid crystal display devices face issues with abnormal metal growth and undercut structures during the electroless nickel/immersion gold process, leading to poor yield and display effects due to over-etching and direct contact with the base, which affects the reliability and flatness of the substrate.

Innovation Solution

The wiring substrate design includes a first insulative layer disposed in the functional, connecting, and bonding regions, with specific via structures to avoid over-etching and direct contact, ensuring the second conductive layer is formed on a flat surface, preventing abnormal metal growth and improving connection reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the electroless nickel/immersion gold process is applied directly to the base, then metal layers are formed, but abnormal metal growth and undercut structures occur due to over-etching

Engineering Contradiction:
Improvemetal layer formation precisionVSAvoidsubstrate connection reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent introduces a first insulative layer as an intermediary between the base and the metal layers. This insulative layer includes via regions that allow controlled metal deposition while preventing direct contact between the base and electroless nickel/immersion gold solution, thereby eliminating abnormal metal growth and undercut structures caused by over-etching.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The insulative layer is segmented into different regions: via regions where metal layers are formed and non-via regions that provide isolation. This segmentation allows precise control over where metal deposition occurs, preventing unwanted metal growth while maintaining connection reliability through controlled via structures.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the base is directly contacted with conductive layers, then electrical connection is achieved, but flatness is compromised due to over-etching

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidsubstrate flatness
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The first insulative layer serves as a mediator that maintains substrate flatness while enabling electrical connection through controlled via structures. The non-via regions provide a flat, isolated surface that prevents over-etching, while the via regions allow precise electrical connections to be formed.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If insulative layers are used to prevent abnormal metal growth, then manufacturing precision improves, but device complexity increases

Engineering Contradiction:
Improvemetal layer formation precisionVSAvoidwiring substrate structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The insulative layer is strategically segmented into via regions and non-via regions, allowing precise control over metal deposition without adding excessive structural complexity. This segmentation enables complex metal layer formation while maintaining a relatively simple overall substrate structure.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240379920A1Wiring substrate and method for preparing same, light-emitting substrate, and display device
Publication Date: 2024.11.14 HEFEI BOE RUISHENG TECH CO LTD
  • US20240379920A1 patent drawing
  • US20240379920A1 patent drawing
  • US20240379920A1 patent drawing

AI summary

Provided is a wiring substrate. The wiring substrate includes: a base, including a functional region, a bonding region, and a connecting region; a first conductive layer, disposed on a side of the base and in the functional region and the connecting region; a first insulative layer, disposed on a side of the first conductive layer and in the functional region, the connecting region, and the bonding region, wherein a first via is defined in a portion of the first insulative layer and is configured to expose the first conductive layer; a second conductive layer, disposed on a side of the first insulative layer and in the connecting region and the bonding region, and electrically connected to the first conductive layer; and a second insulative layer, disposed on a side of the second conductive layer and in the connecting region and the functional region.