Wafer Level Package Redistribution Layer Interposer

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Solution Overview

Problem

The miniaturization of semiconductor dies increases the difficulty in packaging due to higher I/O pad density, and existing wafer level packaging methods face challenges with known-good-die loss during post-molding thermal processes.

Innovation Solution

A semiconductor package with a redistribution layer interposer and a method that involves forming a passivation layer, dielectric and metal layers, ball pads, and applying a molding compound after forming an under-bump metallization layer and solder bumps, which reduces the risk of known-good-die loss by sequencing thermal processes differently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If post-molding thermal processes are applied to the wafer level package, then the packaging structure is completed, but the risk of known-good-die loss increases

Engineering Contradiction:
Improvepackaging structure completionVSAvoidknown-good-die loss risk
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The under-bump metallization layer and solder bumps are formed on the ball pads before the molding compound is applied. This preliminary formation of critical interconnection structures allows the thermal processes to be performed after molding, avoiding exposure of completed solder joints to high temperatures that would cause die loss

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The conventional sequence is inverted: instead of forming under-bump metallization and solder bumps after molding, these structures are formed before molding. The molding compound then encapsulates these structures, protecting them from subsequent thermal processes and eliminating the risk of known-good-die loss

Inventive Principle:
Principle #13The other way round (Inversion)

2Quantity of substance

If semiconductor dies are miniaturized to increase I/O pad density, then the functional requirements are met, but the packaging difficulty increases

Engineering Contradiction:
ImproveI/O pad densityVSAvoidpackaging difficulty
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The ball pads are formed in the first passivation layer on the front surface of the interposer, while the under-bump metallization and solder bumps are formed on the rear surface. This spatial separation across different dimensions and surfaces allows independent processing of high-density pad arrays without increasing packaging complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The interposer structure is segmented into multiple functional layers: first passivation layer with ball pads, RDL for signal redistribution, second passivation layer for protection, and rear-side under-bump metallization with solder bumps. This segmentation allows each layer to be optimized independently for its specific function, managing the complexity of high-density packaging

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9704790B1Method of fabricating a wafer level package
Publication Date: 2017.07.11 MICRON TECHNOLOGY INC
  • US9704790B1 patent drawing
  • US9704790B1 patent drawing
  • US9704790B1 patent drawing

AI summary

A semiconductor package includes a redistribution layer (RDL) interposer having a first side, a second side, opposite to the first side. The RDL interposer comprises a first passivation layer, at least one dielectric layer on the first passivation layer, a metal layer in the at least one dielectric layer, a second passivation layer on the at least one dielectric layer, and a plurality of ball pads in the first passivation layer. At least one semiconductor die is mounted on the first side of the RDL interposer. A solder mask covers a lower surface of the first passivation layer and exposes the plurality of ball pads through a plurality of openings in the solder mask. An under-bump mettalization (UBM) layer is disposed at a bottom of each of the plurality of openings. A solder bump or solder ball is disposed on the UBM layer in each of the plurality of openings.