Word-Addressable NVM in Programmable Logic for Persistent Data

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Solution Overview

Problem

Conventional FPGAs and PLDs are susceptible to information loss after power removal, lacking nonvolatile memory capabilities for persistent data storage.

Innovation Solution

A configurable semiconductor device with configurable logic blocks, routing fabric, and nonvolatile memory (NVM) that includes word addressable NVM storage, utilizing technologies like MRAM, phase-change memory, or FeRAM for persistent data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional FPGAs or PLDs are used, then flexibility and reprogrammability are achieved, but information is lost after power removal

Engineering Contradiction:

Improvedata retentionVSAvoidreprogrammability

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The device segments memory into distinct volatile and nonvolatile portions, allowing different data retention characteristics for different functional requirements. The volatile memory portion provides fast access for active operations, while the nonvolatile memory portion preserves configuration and user data after power removal.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent combines volatile and nonvolatile memory technologies within a single semiconductor device, creating a unified memory system that exhibits both volatile and nonvolatile characteristics. This merged architecture enables the device to maintain reprogrammability while ensuring data retention after power removal.

Inventive Principle:

Principle #5Merging (Combining)

2Productivity

If dedicated custom integrated circuits or ASICs are used, then processing speed and efficiency are improved, but flexibility and resource utilization are reduced

Engineering Contradiction:

Improveprocessing speedVSAvoidflexibility

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The device employs dynamic reconfiguration capabilities through programmable logic blocks that can be selectively programmed to perform different logic functions. This dynamic adaptability allows the hardware to be optimized for specific processing tasks while maintaining the flexibility to be reprogrammed for other functions, bridging the gap between ASIC efficiency and FPGA versatility.

Inventive Principle:

Principle #15Dynamics

3Reliability

If nonvolatile memory is added to provide persistent storage, then data retention after power removal is achieved, but device complexity increases

Engineering Contradiction:

Improvedata retentionVSAvoidmemory architecture

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The nonvolatile memory array serves multiple functions: storing configuration data for the programmable logic blocks, storing user data, and providing random-access memory functionality. This multi-functionality reduces the need for separate dedicated memory components, thereby managing device complexity while providing comprehensive data retention capabilities.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12328120B2Method and system for providing word addressable nonvolatile memory in a programmable logic device

Publication Date: 2025.06.10 GOWIN SEMICON CORP LTD

AI summary

A programmable integrated circuit device able to be selectively programmed to perform one or more logic functions includes multiple configurable logic blocks (“LBs”), routing fabric, and a nonvolatile memory (“NVM”). While the configurable LBs are able to be selectively programmed to perform one or more logic functions, the routing fabric selectively routes information between the configurable LBs and input/output ports based on a routing configuration signals. The NVM, such as magnetoresistive random access memory (“MRAM”), phase-change memory, or ferroelectric RAM (“FeRAM”), is flexibly organized to contain a configuration NVM storage and a user NVM storage, wherein the user NVM storage is a word addressable memory capable of facilitating random memory access.