Word-Addressable NVM in Programmable Logic for Data Retention
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Solution Overview
Problem
Conventional programmable logic devices (PLDs) and field-programmable gate arrays (FPGAs) are susceptible to information loss when the power supply is removed, lacking nonvolatile memory solutions for persistent data retention.
Innovation Solution
A semiconductor device with configurable logic blocks, routing fabric, and nonvolatile memory (NVM) that uses magnetoresistive random access memory (MRAM), phase-change memory, or ferroelectric RAM (FeRAM) for word addressable storage, enabling random memory access and persistent data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional volatile memory is used in PLDs/FPGAs, then processing speed and flexibility are improved, but information is lost after power removal
Solution Approach 1:
The patent merges volatile memory (for fast processing) and nonvolatile memory (for data retention) into a unified memory system. The nonvolatile memory portion is integrated directly into the configurable logic blocks, allowing configuration data to be retained without external volatile memory while maintaining processing speed through the unified architecture.
Solution Approach 2:
The memory cells in the configurable logic blocks are designed to serve dual functions: they act as volatile storage during active processing and as nonvolatile storage when power is removed. This multi-functionality eliminates the need for separate volatile and nonvolatile memory components, resolving the contradiction between speed and data retention.
2Productivity
If dedicated custom integrated circuits are used, then processing performance is improved, but flexibility and resource consumption are worsened
Solution Approach 1:
The patent implements dynamically reconfigurable logic blocks where the functionality and memory characteristics can be changed through programming. The configurable logic blocks can be programmed to have different numbers and types of memory cells, allowing the device to adapt between dedicated high-performance configurations and flexible general-purpose configurations.
Solution Approach 2:
The invention allows changing key parameters of the logic blocks including memory cell count, memory cell type (volatile vs. nonvolatile), and interconnection patterns. This parameter adjustability enables optimization for specific applications while maintaining overall system flexibility, resolving the contradiction between dedicated performance and adaptability.
3Quantity of substance
If more memory cells are added to configurable logic blocks, then storage capacity is improved, but device complexity increases
Solution Approach 1:
The patent segments the memory cells within each configurable logic block into multiple banks or groups that can be independently configured. This segmentation allows the memory to be organized in different patterns (e.g., distributed memory, associative memory, or traditional RAM structures) depending on the application, increasing capacity without proportionally increasing complexity.
Solution Approach 2:
The invention introduces additional organizational dimensions for the memory cells beyond simple linear arrays. Memory cells can be organized in multi-dimensional arrays with row and column addressing, or configured as associative memory with content-addressable access. This dimensional organization increases storage capacity while maintaining manageable complexity through structured access patterns.
Data Source
AI summary
A programmable integrated circuit device able to be selectively programmed to perform one or more logic functions includes multiple configurable logic blocks (“LBs”), routing fabric, and a nonvolatile memory (“NVM”). While the configurable LBs are able to be selectively programmed to perform one or more logic functions, the routing fabric selectively routes information between the configurable LBs and input/output ports based on a routing configuration signals. The NVM, such as magnetoresistive random access memory (“MRAM”), phase-change memory, or ferroelectric RAM (“FeRAM”), is flexibly organized to contain a configuration NVM storage and a user NVM storage, wherein the user NVM storage is a word addressable memory capable of facilitating random memory access.