Word-Addressable NVM in Programmable Logic for Data Persistence
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Solution Overview
Problem
Conventional field-programmable gate arrays (FPGAs) and programmable logic devices (PLDs) are susceptible to information loss when the power supply is removed, lacking nonvolatile memory solutions for persistent data retention.
Innovation Solution
A configurable semiconductor device incorporating configurable logic blocks, a routing fabric, and nonvolatile memory (NVM) such as magnetoresistive random access memory (MRAM), phase-change memory, or ferroelectric RAM, which allows for selective programming and random memory access, enabling data persistence across power cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional FPGAs or PLDs are used, then flexibility and reconfigurability are achieved, but data persistence and nonvolatility are lost when power is removed
Solution Approach 1:
The patent merges volatile memory (for fast configuration access) with nonvolatile memory (for persistent data retention) into a unified memory system. The nonvolatile memory stores configuration data and user information permanently, while the volatile memory provides rapid access during device operation, resolving the contradiction between data persistence and operational flexibility.
Solution Approach 2:
The patent implements preliminary action by pre-storing configuration data and user information in nonvolatile memory before power removal. This ensures that when power is restored, the data is already available in the nonvolatile memory, preventing information loss and enabling quick system recovery without requiring reconfiguration.
2Speed
If dedicated custom integrated circuits or ASICs are used, then processing speed and efficiency are improved, but flexibility and adaptability are reduced
Solution Approach 1:
The patent implements universality by designing a reconfigurable logic device that can perform multiple functions through programmable logic blocks. The device combines the flexibility of FPGAs with the speed of ASICs by using nonvolatile memory to store pre-optimized configuration data, enabling the same hardware to adapt to different applications while maintaining high processing performance.
3Reliability
If nonvolatile memory is added to FPGAs or PLDs, then data persistence is achieved, but device complexity and resource consumption increase
Solution Approach 1:
The patent merges volatile and nonvolatile memory into a unified memory architecture that appears as a single logical memory system to the processor. This integration eliminates the need for separate memory management interfaces and control logic, reducing overall device complexity while providing both fast access and persistent storage capabilities.
Solution Approach 2:
The unified memory system serves multiple functions simultaneously: it acts as both volatile RAM for fast configuration access and nonvolatile storage for persistent data retention. This multi-functionality eliminates the need for separate volatile and nonvolatile memory subsystems, reducing device complexity while achieving information retention.
4Ease of operation
If word addressable nonvolatile memory is implemented, then random memory access capability is improved, but storage capacity and resource usage are increased
Solution Approach 1:
The patent implements partial action by providing word addressable random access capability only for the most frequently accessed configuration data and user information stored in nonvolatile memory. Not all memory locations require full random access capability, allowing the system to achieve ease of operation for critical data while optimizing overall storage capacity usage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a flexible and efficient means to store and retrieve configuration data and user information persistently, optimizing storage capacity and network transmission by using word addressable nonvolatile memory, thus addressing the issue of data loss in conventional FPGAs and PLDs.
Implementation Method 1
The NVM, such as magnetoresistive random access memory ("MRAM"), phase-change memory, or ferroelectric RAM
Implementation Method 2
The NVM, such as magnetoresistive random access memory ("MRAM"), phase-change memory, or ferroelectric RAM
Implementation Method 3
The NVM, such as magnetoresistive random access memory ("MRAM"), phase-change memory, or ferroelectric RAM ("FeRAM")
Data Source
AI summary
A programmable integrated circuit device able to be selectively programmed to perform one or more logic functions includes multiple configurable logic blocks (“LBs”), routing fabric, and a nonvolatile memory (“NVM”). While the configurable LBs are able to be selectively programmed to perform one or more logic functions, the routing fabric selectively routes information between the configurable LBs and input/output ports based on a routing configuration signals. The NVM, such as magnetoresistive random access memory (“MRAM”), phase-change memory, or ferroelectric RAM (“FeRAM”), is flexibly organized to contain a configuration NVM storage and a user NVM storage, wherein the user NVM storage is a word addressable memory capable of facilitating random memory access.