Nonvolatile Memory Word Line Capacitance Measurement
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Solution Overview
Problem
The high degree of integration in nonvolatile memory devices poses challenges in accurately measuring their characteristics, leading to issues that require a new method for precise measurement and control.
Innovation Solution
A nonvolatile memory device is designed with a memory cell array, row decoder, page buffer circuit, and control logic circuit that includes a capacitance detector and voltage generator, enabling the measurement of capacitances of word lines and peripheral circuits by leaking a fixed current and calculating capacitance based on time and voltage variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the degree of integration of the nonvolatile memory device is increased, then manufacturing costs are lowered, but measurement accuracy of device characteristics deteriorates
Solution Approach 1:
The measurement process is segmented into distinct phases: charging phase (applying charging voltage to word line and peripheral circuit), holding phase (maintaining charged state), and discharging phase (leaking fixed current to measure capacitance). This segmentation allows accurate measurement despite high integration by isolating measurement operations from normal device operations.
Solution Approach 2:
A fixed current source is introduced as an intermediary element to discharge the word line and peripheral circuit after charging. By using this controlled current source, the system can accurately measure the total capacitance (word line capacitance + peripheral circuit capacitance) through timing measurements, resolving the measurement accuracy issue in highly integrated devices.
2Quantity of substance
If the degree of integration of the nonvolatile memory device is increased, then device density improves, but difficulty in detecting and measuring characteristics increases
Solution Approach 1:
Before measuring the capacitance characteristics, the system preliminarily charges the word line and peripheral circuit to a known voltage level using a charging voltage source. This preliminary charging action establishes a known initial state, making subsequent capacitance measurement through fixed current discharge feasible and accurate even in highly integrated devices.
Solution Approach 2:
The control logic circuit monitors the discharge process in real-time by detecting when the word line voltage drops below a reference voltage during fixed current leakage. This feedback mechanism allows precise determination of capacitance values by measuring the time required for voltage to drop from the charged state to the reference level, solving the measurement difficulty in high-density devices.
3Ease of manufacture
If high degree of integration is implemented, then manufacturing cost decreases, but reliability of characteristic measurement deteriorates
Solution Approach 1:
The nonvolatile memory device performs self-diagnosis by measuring its own word line capacitance and peripheral circuit capacitance using integrated charging and discharging circuits. The control logic circuit autonomously controls the measurement process, comparing total capacitance measurements with expected values to detect abnormalities, thereby ensuring measurement reliability without external testing equipment.
Solution Approach 2:
The system changes operational parameters by switching between charging mode (applying charging voltage) and discharging mode (applying fixed current) to measure capacitance characteristics. By controlling these parameter changes through the control logic circuit, the system can reliably detect capacitance values and identify device abnormalities even in highly integrated configurations where measurement access is limited.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for accurate measurement of capacitances, improving the performance and diagnosing errors in nonvolatile memory devices, thereby enhancing their functionality and reliability.
Implementation Method 1
a capacitance detector configured to detect a capacitance of the word line and a capacitance of the peripheral circuit by leaking a fixed current from the word line and the peripheral circuit
Implementation Method 2
a voltage generator configured to charge a charging voltage to the word line and the peripheral circuit
Data Source
AI summary
A nonvolatile memory device includes a memory cell array includes memory cells, a row decoder, a page buffer circuit and a control logic circuit. The row decoder is connected to the memory cells through word lines and includes switches configured to select the word lines, respectively. The page buffer circuit is connected to the memory cell array through bit lines. The control logic circuit is configured to perform operational functions when the row decoder turns on a switch corresponding to a particular word line among the word lines. The operational functions include supplying a charging voltage to the particular word line through the switch, stopping the supply of the charging voltage after the charging voltage is supplied to the particular word line, leaking a fixed current from the particular word line through the switch after stopping the supply of the charging voltage, and outputting, to an external device, time information about a time from when the fixed current is initially leaked to a time when a voltage of the particular word line becomes lower than a reference voltage.