Memory Word-Line Defect Detection Using Charge-Pump Timing
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Solution Overview
Problem
Memory devices face defects on word line paths due to electromigration, which can lead to open or short defects, affecting reliability and performance.
Innovation Solution
A memory device that detects defects on word line paths by comparing initial and post-current count values of a clock signal, using a charge pump circuit and current generation circuit to accelerate electromigration and analyze changes in clock signal count to identify defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high voltage is applied through word lines to store data in memory cells, then data storage function is achieved, but defects on word line path occur due to electromigration
Solution Approach 1:
The patent applies preliminary action by performing defect detection before the word line path actually fails. A current generation circuit applies a detection current to the word line path, and a clock signal counter measures the time required for a charge pump circuit to generate a detection voltage. By comparing the measured time with a reference time, the system can identify potential electromigration defects before they cause actual open or short failures, enabling preventive maintenance and improving overall reliability.
Solution Approach 2:
The patent uses an intermediary approach by introducing a charge pump circuit and clock signal counter as mediators to indirectly detect word line path defects. Instead of directly measuring the word line path condition, the system measures the time required for the charge pump to generate voltage, which is influenced by the word line path's electrical characteristics. This intermediary measurement method enables defect detection without directly interfering with normal memory operations.
2Reliability
If a detection method is implemented to identify electromigration defects, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing circuits that serve multiple functions. The charge pump circuit not only generates high voltage for normal memory operations but also serves as part of the detection system by measuring the time required to generate a detection voltage. Similarly, the clock signal counter serves both as a timing mechanism for the detection process and as part of the overall control logic. This multi-functionality reduces the need for separate dedicated detection circuits, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent employs self-service by using existing circuit components to perform detection functions. The charge pump circuit uses its own voltage generation capability to create the detection voltage, and the word line path itself serves as the test subject while also being part of the measurement system. This self-service approach eliminates the need for entirely separate detection hardware, keeping the added complexity minimal while achieving reliable defect detection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the reliability of memory devices by detecting and locating word line path defects before they occur, improving the integrity and performance of the memory system.
Implementation Method 1
a charge pump circuit configured to generate a voltage to be provided to the plurality of word lines, based on the clock signal
Implementation Method 2
the defects of lines or wires due to electromigration (EM) may occur on a word line path to which the high voltage is applied
Data Source
AI summary
A memory device includes a memory cell array connected to a plurality of word lines, a clock generator configured to generate a clock signal, a charge pump circuit configured to generate a voltage to be provided to the plurality of word lines, based on the clock signal, a row decoder configured to provide the voltage to a selected memory block, a current generation circuit connected in parallel to a word line path through which the voltage is provided from the charge pump circuit to the row decoder and configured to generate a current flowing through the word line path for a reference time, and a defect detection circuit configured to detect a defect on the word line path by comparing a first count value of the clock signal counted before the reference time with a second count value of the clock signal counted after the reference time.