Word Line Contact Pad Structure for Reliable 3D Memory Gates
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor memory devices face challenges in increasing data storage capacity and ensuring reliable electrical connections between gate electrodes and word line contacts.
Innovation Solution
The design includes a contact spacer surrounding the side surface of the word line contact, with a gate electrode having a plate part and a pad part that protrudes towards the word line contact, enhancing electrical connectivity and preventing contact failure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate electrode is directly connected to the word line contact, then the electrical connection is simple, but contact failure may occur reducing reliability
Solution Approach 1:
The pad part of the gate electrode acts as an intermediary element between the word line contact and the plate part. This intermediate structure ensures reliable electrical connection by providing a dedicated contact interface, preventing direct contact failures while maintaining structural organization.
Solution Approach 2:
The gate electrode is segmented into distinct functional parts: the plate part for electrical connection and the pad part for contact interface. This segmentation allows each part to perform its specific function optimally, with the pad part specifically designed to prevent contact failure.
2Reliability
If the pad part of the gate electrode protrudes towards the word line contact, then contact reliability is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The pad part is preliminarily formed as an extended structure during the gate electrode fabrication process, protruding towards the word line contact position. This preliminary configuration ensures that the contact interface is pre-positioned, reducing the need for high-precision alignment during subsequent assembly steps.
Data Source
AI summary
A semiconductor memory device including a substrate; a mold structure including a plurality of mold insulating layers and a plurality of gate electrodes alternately stacked on each other on the substrate in a first direction; a channel structure passing through the mold structure and extending in the first direction; a word line contact passing through a portion of the mold structure and extending in the first direction; and a contact spacer surrounding a side surface of the word line contact. The plurality of gate electrodes include a first gate electrode electrically connected to the word line contact. The first gate electrode includes a plate part extending in a second direction perpendicular to the first direction, and a pad part protruding from the plate part toward the word line contact. One surface of the pad part is in contact with the word line contact.