Semiconductor Memory Word Line Direct Diode Connection

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Solution Overview

Problem

Conventional semiconductor memory devices face issues with electrical charging of word lines during fabrication, leading to charge injection into the charge storage layer and stress on gate oxide films, which affects data storage and device reliability.

Innovation Solution

A semiconductor memory device design where the word line is directly connected to a protective diode region, allowing for electrical connection to a diffusion layer of a second conductivity type, preventing charge injection by maintaining a reverse voltage across the pn junction, even after the conductive layer for word line formation is deposited.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the word line is connected to the protective diode region through a metal interconnect layer, then the protective diode can prevent charge injection during fabrication processes, but the protective diode cannot function until the interconnect layer is formed, leaving the word line vulnerable during intermediate processes

Engineering Contradiction:
Improveprotection against charge injectionVSAvoidtime period without protection
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by forming a conductive layer in direct contact with the protective diode region before the interconnect layer is formed. This conductive layer is created during the same process as the word line formation, enabling the protective diode to function immediately and prevent charge injection during fabrication processes that occur between word line formation and interconnect layer formation.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the word line is directly connected to the protective diode region, then protection against electrical charging is provided immediately, but the device structure becomes more complex

Engineering Contradiction:
Improveprotection against electrical chargingVSAvoidconnection structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the protective diode connection with the word line formation process by using the same conductive layer for both purposes. The conductive layer that forms the word line in the memory cell array region is extended to directly contact the protective diode region, eliminating the need for separate interconnect layers and contacts for the protective diode connection.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of manufacture

If conventional connection methods are used, then fabrication processes can be completed, but charge injection into the charge storage layer occurs during processes after word line formation

Engineering Contradiction:
Improvefabrication process completionVSAvoidcharge injection
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by establishing the protective diode connection at the same time as the word line is formed, before any fabrication processes that could cause electrical charging occur. The conductive layer is patterned to extend to the protective diode region during the word line formation process, creating an immediate current path that prevents charge injection during subsequent plasma processes and other fabrication steps.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively prevents charge injection and stress on the charge storage layer, ensuring stable data storage and extending the lifespan of the gate oxide films by maintaining a controlled voltage across the pn junction.

Implementation Method 1

maintaining a reverse voltage across the pn junction, preventing charge injection

Methodology Applied
Scientific Effectpn junction reverse voltage: Diode

Data Source

PatentUS7474548B2Semiconductor memory device and method for manufacturing the same
Publication Date: 2009.01.06 PANNOVA SEMIC LLC
  • US7474548B2 patent drawing
  • US7474548B2 patent drawing
  • US7474548B2 patent drawing

AI summary

A semiconductor memory device includes: a memory cell array region formed in a semiconductor region of a first conductivity type and having a plurality of memory cells arranged in rows and columns; a plurality of word lines each of which collectively connects ones of the plurality of memory cells aligned in the same row; and a protective diode region formed in the semiconductor region to be separated from the memory cell array region. In the protective diode region, a protective diode element is constructed by making a junction between a first diffusion layer of a second conductivity type formed in the upper portion of the semiconductor region and the semiconductor region. Each of the word lines extends to the protective diode region and is brought into direct connection to the first diffusion layer of the second conductivity type, thereby making electrical connection to the protective diode element.