Semiconductor Memory Word Line Discharge Voltage Control
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Solution Overview
Problem
The existing semiconductor memory apparatuses require a substantial time to discharge word lines from a high voltage level to ground voltage and back to a specified level for data programming and reading operations, leading to inefficient current consumption.
Innovation Solution
A semiconductor memory apparatus that includes a voltage transfer unit for transferring different word line control voltages during programming and reading operations, and a word line discharge unit that discharges the word line to a voltage level higher than ground voltage, reducing the time and current consumption by controlling the discharge period and slew rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the word line is discharged to ground voltage (VSS) during the discharge period, then the word line voltage is lowered to enable subsequent reading operations, but a substantial time is required to lower and re-elevate the word line, leading to increased current consumption
Solution Approach 1:
The patent changes the discharge voltage parameter from ground voltage (VSS) to an intermediate voltage level that is higher than VSS. Specifically, the word line is discharged to a voltage level between VSS and the programming voltage, reducing the voltage swing required. This parameter change directly reduces the time and current consumption while maintaining proper word line control for subsequent operations.
2Manufacturing precision
If the word line control voltage for data programming is repeatedly supplied to perform programming and verify operations, then the memory cells are precisely programmed, but a substantial time is required to discharge and re-elevate the word line between operations
Solution Approach 1:
The patent modifies the discharge voltage parameter to an intermediate level rather than fully discharging to VSS. This reduces the voltage swing amplitude, thereby reducing the time required for both discharge and subsequent re-elevation operations while maintaining the ability to perform precise programming operations.
Solution Approach 2:
The patent performs a preliminary discharge to an intermediate voltage level that prepares the word line for the next operation without requiring a full discharge to VSS. This preliminary action at an optimized voltage level reduces the subsequent re-elevation time while ensuring the word line is properly prepared for accurate programming operations.
3Ease of operation
If the word line is discharged to ground voltage (VSS) between programming and reading operations, then the word line is fully reset, but the operation time increases due to the substantial time required for discharge and re-elevation
Solution Approach 1:
The patent changes the reset voltage parameter from VSS to an intermediate voltage level. This intermediate level is sufficient to reset the word line for subsequent reading operations while requiring less time for both discharge and re-elevation, thereby improving operation speed without compromising the ease of word line control.
Data Source
AI summary
A semiconductor memory apparatus includes a voltage transfer unit configured to transfer a first word line control voltage among a plurality of word line control voltages to an assigned word line in a first operational period, and to transfer a second word line control voltage among the plurality of word line control voltages to the assigned word line in a second operational period; and a word line discharge unit configured to discharge the word line to a voltage level that is higher than a ground voltage and lower than the first and second word line control voltages in a discharge period between the first operational period and the second operational period.