Surrounding Word Line Layout for DRAM Gate Alignment

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Solution Overview

Problem

As semiconductor fabrication technology advances, reducing transistor cell sizes to a few nanometers leads to overlay shift issues, causing misalignment and performance degradation in DRAM cells, particularly in trench capacitor structures.

Innovation Solution

A memory device design where a sacrificial material is strategically positioned to define the gate structure's location, allowing for precise formation of a gate structure surrounded by a word line, preventing incomplete enclosure and overlay shifts, with the sacrificial material being replaced by the gate structure during manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If device size is reduced to nanometer scale, then productivity and integration density are improved, but overlay shift occurs causing misalignment and reduced manufacturing precision

Engineering Contradiction:
Improveintegration densityVSAvoidalignment accuracy
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a sacrificial material structure before the word line to predefine the gate structure location. This preliminary structure serves as a reference that ensures accurate alignment of the word line surrounding the gate structure, preventing overlay shift even at nanometer scale dimensions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The sacrificial material acts as an intermediary element between the capacitor structure and the final gate structure. It provides a temporary reference structure that guides the formation of the surrounding word line, ensuring precise alignment without requiring direct alignment between the word line and the final gate structure

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If conventional manufacturing process is used, then ease of manufacture is maintained, but incomplete enclosure of gate structure by word line occurs reducing reliability

Engineering Contradiction:
Improveprocess simplicityVSAvoidgate enclosure completeness
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The sacrificial material serves as an intermediary reference structure that enables complete enclosure of the gate structure by the word line. By forming the word line to surround the sacrificial material first, the process ensures complete enclosure without requiring complex alignment steps or additional manufacturing complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The process performs preliminary action by forming the word line structure to surround the sacrificial material before removing the sacrificial material and forming the final gate structure. This preliminary enclosure ensures complete gate structure surrounding without requiring subsequent alignment adjustments

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240023321A1Memory device having word line surrounding gate structure and manufacturing method thereof
Publication Date: 2024.01.18 NAN YA TECH
  • US20240023321A1 patent drawing
  • US20240023321A1 patent drawing
  • US20240023321A1 patent drawing

AI summary

The present application provides a memory device having a word line (WL) surrounding a gate structure and a manufacturing method of the memory device. The memory device includes a first dielectric surrounding a capacitor; a second dielectric disposed over the first dielectric and the capacitor; a word line embedded in the second dielectric; and a gate structure disposed over the capacitor and extending through the second dielectric, wherein the gate structure is at least partially surrounded by the word line.